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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Mips/MipsGenInstrInfo.inc 5432 { 617, 3, 1, 4, 534, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #617 = ADDS_A_B
5436 { 621, 3, 1, 4, 534, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #621 = ADDS_S_B
5440 { 625, 3, 1, 4, 534, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #625 = ADDS_U_B
5463 { 648, 3, 1, 4, 535, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #648 = ADDV_B
5469 { 654, 3, 1, 4, 533, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #654 = ADD_A_B
5495 { 680, 3, 1, 4, 543, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #680 = AND_V
5501 { 686, 3, 1, 4, 536, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #686 = ASUB_S_B
5505 { 690, 3, 1, 4, 536, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #690 = ASUB_U_B
5513 { 698, 3, 1, 4, 537, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #698 = AVER_S_B
5517 { 702, 3, 1, 4, 537, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #702 = AVER_U_B
5521 { 706, 3, 1, 4, 537, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #706 = AVE_S_B
5525 { 710, 3, 1, 4, 537, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #710 = AVE_U_B
5569 { 754, 3, 1, 4, 516, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #754 = BCLR_B
5678 { 863, 3, 1, 4, 517, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #863 = BNEG_B
5715 { 900, 3, 1, 4, 515, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #900 = BSET_B
5756 { 941, 3, 1, 4, 551, 0|(1ULL<<MCID::Commutable), 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #941 = CEQ_B
5780 { 965, 3, 1, 4, 550, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #965 = CLE_S_B
5784 { 969, 3, 1, 4, 550, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #969 = CLE_U_B
5800 { 985, 3, 1, 4, 549, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #985 = CLT_S_B
5804 { 989, 3, 1, 4, 549, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #989 = CLT_U_B
6083 { 1268, 3, 1, 4, 609, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1268 = DIV_S_B
6087 { 1272, 3, 1, 4, 609, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1272 = DIV_U_B
6430 { 1615, 3, 1, 4, 601, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1615 = ILVEV_B
6434 { 1619, 3, 1, 4, 600, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1619 = ILVL_B
6438 { 1623, 3, 1, 4, 601, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1623 = ILVOD_B
6442 { 1627, 3, 1, 4, 600, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1627 = ILVR_B
6673 { 1858, 3, 1, 4, 614, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1858 = MAX_A_B
6680 { 1865, 3, 1, 4, 612, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1865 = MAX_S_B
6685 { 1870, 3, 1, 4, 613, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1870 = MAX_U_B
6732 { 1917, 3, 1, 4, 614, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1917 = MIN_A_B
6739 { 1924, 3, 1, 4, 612, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1924 = MIN_S_B
6744 { 1929, 3, 1, 4, 613, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1929 = MIN_U_B
6754 { 1939, 3, 1, 4, 608, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1939 = MOD_S_B
6758 { 1943, 3, 1, 4, 608, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1943 = MOD_U_B
6907 { 2092, 3, 1, 4, 662, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2092 = MULV_B
6947 { 2132, 3, 1, 4, 543, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2132 = NOR_V
6960 { 2145, 3, 1, 4, 543, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2145 = OR_V
6970 { 2155, 3, 1, 4, 621, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2155 = PCKEV_B
6974 { 2159, 3, 1, 4, 621, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2159 = PCKOD_B
7235 { 2420, 3, 1, 4, 620, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2420 = SLL_B
7272 { 2457, 3, 1, 4, 618, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2457 = SRAR_B
7278 { 2463, 3, 1, 4, 616, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2463 = SRA_B
7294 { 2479, 3, 1, 4, 619, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2479 = SRLR_B
7300 { 2485, 3, 1, 4, 617, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2485 = SRL_B
7327 { 2512, 3, 1, 4, 604, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2512 = SUBSUS_U_B
7331 { 2516, 3, 1, 4, 605, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2516 = SUBSUU_S_B
7335 { 2520, 3, 1, 4, 603, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2520 = SUBS_S_B
7339 { 2524, 3, 1, 4, 603, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2524 = SUBS_U_B
7362 { 2547, 3, 1, 4, 607, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2547 = SUBV_B
7521 { 2706, 3, 1, 4, 543, 0, 0x6ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #2706 = XOR_V