reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
4369 case Mips::LO0: OpKind = MCK_LO32; break;
gen/lib/Target/Mips/MipsGenGlobalISel.inc1516 GIR_AddImplicitDef, /*InsnID*/0, Mips::LO0, 1540 GIR_AddImplicitDef, /*InsnID*/0, Mips::LO0, 1564 GIR_AddImplicitDef, /*InsnID*/0, Mips::LO0, 1584 GIR_AddImplicitDef, /*InsnID*/0, Mips::LO0,gen/lib/Target/Mips/MipsGenInstrInfo.inc
4434 static const MCPhysReg ImplicitList6[] = { Mips::HI0, Mips::LO0, 0 }; 4439 static const MCPhysReg ImplicitList11[] = { Mips::HI0, Mips::LO0, Mips::P0, Mips::P1, Mips::P2, 0 }; 4451 static const MCPhysReg ImplicitList23[] = { Mips::LO0, 0 };gen/lib/Target/Mips/MipsGenRegisterInfo.inc
1620 { Mips::LO0 }, 2157 Mips::LO0, Mips::LO1, Mips::LO2, Mips::LO3, 2267 Mips::LO0, 2813 { 65U, Mips::LO0 }, 2889 { 65U, Mips::LO0 }, 2983 { Mips::LO0, 65U }, 3187 { Mips::LO0, 65U }, 7400 static const MCPhysReg CSR_Interrupt_32_SaveList[] = { Mips::A3, Mips::A2, Mips::A1, Mips::A0, Mips::S7, Mips::S6, Mips::S5, Mips::S4, Mips::S3, Mips::S2, Mips::S1, Mips::S0, Mips::V1, Mips::V0, Mips::T9, Mips::T8, Mips::T7, Mips::T6, Mips::T5, Mips::T4, Mips::T3, Mips::T2, Mips::T1, Mips::T0, Mips::RA, Mips::FP, Mips::GP, Mips::AT, Mips::LO0, Mips::HI0, 0 };lib/Target/Mips/Mips16InstrInfo.cpp
84 else if ((SrcReg == Mips::LO0) &&
lib/Target/Mips/MipsFastISel.cpp 2144 .addReg(Mips::LO0, RegState::ImplicitDefine | RegState::Dead);
lib/Target/Mips/MipsISelLowering.cpp574 unsigned LO = (Ty == MVT::i32) ? Mips::LO0 : Mips::LO0_64; 3999 return std::make_pair((unsigned)Mips::LO0, &Mips::LO32RegClass);lib/Target/Mips/MipsSEFrameLowering.cpp
814 bool IsLOHI = (Reg == Mips::LO0 || Reg == Mips::LO0_64 ||
lib/Target/Mips/MipsSEInstrInfo.cpp 334 (DestReg == Mips::LO0 || DestReg == Mips::LO0_64 ||