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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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Declarations
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 3879 extern const TargetRegisterClass F8RCRegClass;
References
gen/lib/Target/PowerPC/PPCGenFastISel.inc 51 return fastEmitInst_(PPC::MFFS, &PPC::F8RCRegClass);
333 return fastEmitInst_r(PPC::FABSD, &PPC::F8RCRegClass, Op0, Op0IsKill);
407 return fastEmitInst_r(PPC::FRIPD, &PPC::F8RCRegClass, Op0, Op0IsKill);
474 return fastEmitInst_r(PPC::FRIMD, &PPC::F8RCRegClass, Op0, Op0IsKill);
588 return fastEmitInst_r(PPC::FNEGD, &PPC::F8RCRegClass, Op0, Op0IsKill);
823 return fastEmitInst_r(PPC::FRIND, &PPC::F8RCRegClass, Op0, Op0IsKill);
890 return fastEmitInst_r(PPC::FSQRT, &PPC::F8RCRegClass, Op0, Op0IsKill);
951 return fastEmitInst_r(PPC::FRIZD, &PPC::F8RCRegClass, Op0, Op0IsKill);
1181 return fastEmitInst_r(PPC::FCFID, &PPC::F8RCRegClass, Op0, Op0IsKill);
1217 return fastEmitInst_r(PPC::FCFIDU, &PPC::F8RCRegClass, Op0, Op0IsKill);
1262 return fastEmitInst_r(PPC::FCTIDUZ, &PPC::F8RCRegClass, Op0, Op0IsKill);
1290 return fastEmitInst_r(PPC::FCTIDZ, &PPC::F8RCRegClass, Op0, Op0IsKill);
1318 return fastEmitInst_r(PPC::FCTIWUZ, &PPC::F8RCRegClass, Op0, Op0IsKill);
1347 return fastEmitInst_r(PPC::FCTIWZ, &PPC::F8RCRegClass, Op0, Op0IsKill);
1381 return fastEmitInst_r(PPC::FRE, &PPC::F8RCRegClass, Op0, Op0IsKill);
1451 return fastEmitInst_r(PPC::FRSQRTE, &PPC::F8RCRegClass, Op0, Op0IsKill);
1946 return fastEmitInst_rr(PPC::FADD, &PPC::F8RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2032 return fastEmitInst_rr(PPC::FDIV, &PPC::F8RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2194 return fastEmitInst_rr(PPC::FMUL, &PPC::F8RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
2277 return fastEmitInst_rr(PPC::FSUB, &PPC::F8RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
3013 return fastEmitInst_rr(PPC::FADDrtz, &PPC::F8RCRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
gen/lib/Target/PowerPC/PPCGenRegisterInfo.inc 4213 &PPC::F8RCRegClass,
4797 &PPC::F8RCRegClass,
lib/Target/PowerPC/PPCAsmPrinter.cpp 552 PPC::F8RCRegClass.contains(Reg) ||
lib/Target/PowerPC/PPCFastISel.cpp 471 (VT == MVT::f64 ? (HasSPE ? &PPC::SPERCRegClass : &PPC::F8RCRegClass) :
1053 const TargetRegisterClass *RC = &PPC::F8RCRegClass;
1132 const TargetRegisterClass *RC = &PPC::F8RCRegClass;
1219 SrcReg = copyRegToRegClass(&PPC::F8RCRegClass, SrcReg);
1242 DestReg = createResultReg(&PPC::F8RCRegClass);
2007 RC = ((VT == MVT::f32) ? &PPC::F4RCRegClass : &PPC::F8RCRegClass);
lib/Target/PowerPC/PPCFrameLowering.cpp 1905 } else if (PPC::F8RCRegClass.contains(Reg)) {
2155 (!PPC::F8RCRegClass.contains(Reg) &&
lib/Target/PowerPC/PPCISelLowering.cpp 152 addRegisterClass(MVT::f64, &PPC::F8RCRegClass);
3507 RC = &PPC::F8RCRegClass;
3655 VReg = MF.addLiveIn(FPArgRegs[FPRIndex], &PPC::F8RCRegClass);
3947 : &PPC::F8RCRegClass);
4349 VReg = MF.addLiveIn(FPR[FPR_idx], &PPC::F8RCRegClass);
6950 else if (PPC::F8RCRegClass.contains(*I))
11440 Register MFFSReg = RegInfo.createVirtualRegister(&PPC::F8RCRegClass);
11530 if (RC == &PPC::F8RCRegClass) {
11540 (RegInfo.getRegClass(DestReg) == &PPC::F8RCRegClass) &&
11612 Register NewFPSCRReg = RegInfo.createVirtualRegister(&PPC::F8RCRegClass);
14334 return std::make_pair(0U, &PPC::F8RCRegClass);
15038 else if (PPC::F8RCRegClass.contains(*I))
15039 RC = &PPC::F8RCRegClass;
lib/Target/PowerPC/PPCInstrInfo.cpp 911 if (PPC::F8RCRegClass.contains(DestReg) &&
920 } else if (PPC::F8RCRegClass.contains(SrcReg) &&
1040 } else if (PPC::F8RCRegClass.hasSubClassEq(RC)) {
1078 } else if (PPC::F8RCRegClass.contains(Reg)) {
1126 } else if (PPC::F8RCRegClass.hasSubClassEq(RC)) {
1164 } else if (PPC::F8RCRegClass.contains(Reg)) {
lib/Target/PowerPC/PPCRegisterInfo.cpp 471 if (RC == &PPC::F8RCRegClass)
lib/Target/PowerPC/PPCVSXCopy.cpp 71 return IsRegInClass(Reg, &PPC::F8RCRegClass, MRI);