reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1805 extern const TargetRegisterClass GR32BitRegClass;
2037 &SystemZ::GR32BitRegClass, 2357 &SystemZ::GR32BitRegClass,lib/Target/SystemZ/SystemZISelLowering.cpp
84 addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass); 1082 return std::make_pair(0U, &SystemZ::GR32BitRegClass); 1119 return parseRegisterNumber(Constraint, &SystemZ::GR32BitRegClass, 1330 RC = &SystemZ::GR32BitRegClass; 6828 &SystemZ::GR32BitRegClass : 6946 &SystemZ::GR32BitRegClass : 7058 const TargetRegisterClass *RC = &SystemZ::GR32BitRegClass;lib/Target/SystemZ/SystemZInstrInfo.cpp
554 SystemZ::GR32BitRegClass.hasSubClassEq(RC) || 587 MRI.constrainRegClass(DstReg, &SystemZ::GR32BitRegClass); 588 Register TReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass); 589 Register FReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass); 859 SystemZ::GR32BitRegClass.contains(SrcReg)) 861 else if (SystemZ::GR32BitRegClass.contains(DestReg) && 1461 if (RC == &SystemZ::GR32BitRegClass || RC == &SystemZ::ADDR32BitRegClass) {lib/Target/SystemZ/SystemZRegisterInfo.cpp
34 if (SystemZ::GR32BitRegClass.hasSubClassEq(RC) || 37 return &SystemZ::GR32BitRegClass; 45 if (SystemZ::GR32BitRegClass.contains(PhysReg)) 46 return &SystemZ::GR32BitRegClass; 136 addHints(Order, Hints, &SystemZ::GR32BitRegClass, MRI); 416 return &SystemZ::GR32BitRegClass;lib/Target/SystemZ/SystemZRegisterInfo.h
37 assert(SystemZ::GR32BitRegClass.contains(Reg) && "Invalid GRX32");