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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 7155 case X86::ESI: OpKind = MCK_Reg32; break;
gen/lib/Target/X86/X86GenCallingConv.inc 198 X86::EDI, X86::ESI, X86::EDX, X86::ECX
707 X86::EBX, X86::EBP, X86::EDI, X86::ESI
736 X86::ESI, X86::EBP, X86::EAX, X86::EDX, X86::ECX
834 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI
1447 X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D
1900 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R12D, X86::R13D, X86::R14D, X86::R15D
2363 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R12D, X86::R14D, X86::R15D
3001 X86::ESI, X86::EBP, X86::EAX, X86::EDX
3071 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI
3641 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R12D, X86::R13D, X86::R14D, X86::R15D
3841 X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R12D, X86::R14D, X86::R15D
gen/lib/Target/X86/X86GenInstrInfo.inc16586 static const MCPhysReg ImplicitList24[] = { X86::EDI, X86::ESI, X86::DF, 0 };
16587 static const MCPhysReg ImplicitList25[] = { X86::EDI, X86::ESI, X86::EFLAGS, 0 };
16613 static const MCPhysReg ImplicitList51[] = { X86::ESI, X86::DF, 0 };
16614 static const MCPhysReg ImplicitList52[] = { X86::AL, X86::ESI, 0 };
16615 static const MCPhysReg ImplicitList53[] = { X86::EAX, X86::ESI, 0 };
16616 static const MCPhysReg ImplicitList54[] = { X86::RAX, X86::ESI, 0 };
16617 static const MCPhysReg ImplicitList55[] = { X86::AX, X86::ESI, 0 };
16622 static const MCPhysReg ImplicitList60[] = { X86::EDI, X86::ESI, 0 };
16630 static const MCPhysReg ImplicitList68[] = { X86::DX, X86::ESI, X86::DF, 0 };
16631 static const MCPhysReg ImplicitList69[] = { X86::ESI, 0 };
16637 static const MCPhysReg ImplicitList75[] = { X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, 0 };
16642 static const MCPhysReg ImplicitList80[] = { X86::ECX, X86::EDI, X86::ESI, 0 };
gen/lib/Target/X86/X86GenRegisterInfo.inc 1593 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RIP, X86::RBP,
1603 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RIP,
1613 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D, X86::RBP,
1643 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D,
1653 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R14D, X86::R15D, X86::R12D, X86::R13D,
1663 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::RBP,
1673 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP,
1693 X86::EAX, X86::ECX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP,
1773 X86::EBX, X86::ESI,
1813 X86::ESI, X86::EDI,
1893 X86::ESI,
2795 { 6U, X86::ESI },
2840 { 6U, X86::ESI },
2962 { 6U, X86::ESI },
3007 { 6U, X86::ESI },
3053 { X86::ESI, -2U },
3203 { X86::ESI, 6U },
3353 { X86::ESI, 6U },
3503 { X86::ESI, -2U },
3653 { X86::ESI, 6U },
3803 { X86::ESI, 6U },
9998 static const MCPhysReg CSR_32_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0 };
10000 static const MCPhysReg CSR_32EHRet_SaveList[] = { X86::EAX, X86::EDX, X86::ESI, X86::EDI, X86::EBX, X86::EBP, 0 };
10002 static const MCPhysReg CSR_32_AllRegs_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, 0 };
10004 static const MCPhysReg CSR_32_AllRegs_AVX_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, 0 };
10006 static const MCPhysReg CSR_32_AllRegs_AVX512_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::K0, X86::K1, X86::K2, X86::K3, X86::K4, X86::K5, X86::K6, X86::K7, 0 };
10008 static const MCPhysReg CSR_32_AllRegs_SSE_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, 0 };
10010 static const MCPhysReg CSR_32_RegCall_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, 0 };
10012 static const MCPhysReg CSR_32_RegCall_NoSSE_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, 0 };
10056 static const MCPhysReg CSR_Win32_CFGuard_Check_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::ECX, 0 };
10058 static const MCPhysReg CSR_Win32_CFGuard_Check_NoSSE_SaveList[] = { X86::ESI, X86::EDI, X86::EBX, X86::EBP, X86::ESP, X86::ECX, 0 };
lib/Target/X86/AsmParser/X86AsmParser.cpp 1219 unsigned Basereg = is64BitMode() ? X86::RSI : (Parse32 ? X86::ESI : X86::SI);
1239 case X86::ESI:
1256 return IsSIReg ? X86::ESI : X86::EDI;
lib/Target/X86/AsmParser/X86Operand.h 377 (getMemBaseReg() == X86::RSI || getMemBaseReg() == X86::ESI ||
lib/Target/X86/Disassembler/X86Disassembler.cpp 270 static constexpr MCPhysReg llvmRegnums[] = {ALL_REGS};
335 baseRegNo = insn.hasAdSize ? X86::ESI : X86::RSI;
337 baseRegNo = insn.hasAdSize ? X86::SI : X86::ESI;
340 baseRegNo = insn.hasAdSize ? X86::ESI : X86::SI;
507 ALL_REGS
552 ALL_SIB_BASES
567 EA_BASES_32BIT
645 ALL_EA_BASES
lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp 506 case X86::ESI:
679 X86::EBX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::EBP, 0
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp 1305 (siReg == X86::ESI && MI.getOperand(0).getReg() == X86::EDI) ||
1312 if ((!is32BitMode(STI) && siReg == X86::ESI) ||
1325 if ((!is32BitMode(STI) && siReg == X86::ESI) ||
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp 111 {codeview::RegisterId::ESI, X86::ESI},
610 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI:
638 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI:
675 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI:
711 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI:
712 return X86::ESI;
747 case X86::SIL: case X86::SI: case X86::ESI: case X86::RSI:
lib/Target/X86/MCTargetDesc/X86WinCOFFTargetStreamer.cpp 300 case X86::ESI: OS << "$esi"; break;
lib/Target/X86/X86CallingConv.cpp 34 X86::ESI};
lib/Target/X86/X86FastISel.cpp 3118 X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D
lib/Target/X86/X86ISelLowering.cpp31372 assert(TRI->getBaseRegister() == X86::ESI &&
46065 return std::make_pair(X86::ESI, &X86::GR32_SIDIRegClass);
lib/Target/X86/X86RegisterInfo.cpp 71 BasePtr = X86::ESI;
lib/Target/X86/X86SelectionDAGInfo.cpp 192 const unsigned SI = Use64BitRegs ? X86::RSI : X86::ESI;
303 X86::ECX, X86::ESI, X86::EDI};