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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenDAGISel.inc57396 /*121420*/ OPC_EmitInteger, MVT::i32, X86::FR32RegClassID,
75224 /*158691*/ OPC_EmitInteger, MVT::i32, X86::FR32RegClassID,
75258 /*158781*/ OPC_EmitInteger, MVT::i32, X86::FR32RegClassID,
gen/lib/Target/X86/X86GenGlobalISel.inc 6978 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
6989 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
7001 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
7012 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
12702 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
12703 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
12704 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
12713 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
12714 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
12715 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
13005 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
13006 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
13007 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
13016 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
13017 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
13018 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
13308 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
13309 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
13310 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
13319 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
13320 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
13321 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
13611 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
13612 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
13613 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
13622 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
13623 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
13624 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
13947 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
13967 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
14078 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
14111 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
14211 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
14233 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
14279 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
14301 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
14425 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
14436 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
14447 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
14466 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
16801 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
16802 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
16811 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
16812 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
gen/lib/Target/X86/X86GenInstrInfo.inc16727 static const MCOperandInfo OperandInfo54[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16762 static const MCOperandInfo OperandInfo89[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16762 static const MCOperandInfo OperandInfo89[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16763 static const MCOperandInfo OperandInfo90[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16763 static const MCOperandInfo OperandInfo90[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16763 static const MCOperandInfo OperandInfo90[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16813 static const MCOperandInfo OperandInfo140[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16813 static const MCOperandInfo OperandInfo140[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16813 static const MCOperandInfo OperandInfo140[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16840 static const MCOperandInfo OperandInfo167[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16840 static const MCOperandInfo OperandInfo167[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16841 static const MCOperandInfo OperandInfo168[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16841 static const MCOperandInfo OperandInfo168[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16841 static const MCOperandInfo OperandInfo168[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16844 static const MCOperandInfo OperandInfo171[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16845 static const MCOperandInfo OperandInfo172[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16845 static const MCOperandInfo OperandInfo172[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16851 static const MCOperandInfo OperandInfo178[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16854 static const MCOperandInfo OperandInfo181[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16857 static const MCOperandInfo OperandInfo184[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16858 static const MCOperandInfo OperandInfo185[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16861 static const MCOperandInfo OperandInfo188[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16862 static const MCOperandInfo OperandInfo189[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16964 static const MCOperandInfo OperandInfo291[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16979 static const MCOperandInfo OperandInfo306[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16980 static const MCOperandInfo OperandInfo307[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16980 static const MCOperandInfo OperandInfo307[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17050 static const MCOperandInfo OperandInfo377[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17050 static const MCOperandInfo OperandInfo377[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17051 static const MCOperandInfo OperandInfo378[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17051 static const MCOperandInfo OperandInfo378[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17051 static const MCOperandInfo OperandInfo378[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17145 static const MCOperandInfo OperandInfo472[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17145 static const MCOperandInfo OperandInfo472[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17237 static const MCOperandInfo OperandInfo564[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17237 static const MCOperandInfo OperandInfo564[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17244 static const MCOperandInfo OperandInfo571[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17244 static const MCOperandInfo OperandInfo571[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17251 static const MCOperandInfo OperandInfo578[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17251 static const MCOperandInfo OperandInfo578[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17253 static const MCOperandInfo OperandInfo580[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17315 static const MCOperandInfo OperandInfo642[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17315 static const MCOperandInfo OperandInfo642[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17315 static const MCOperandInfo OperandInfo642[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17316 static const MCOperandInfo OperandInfo643[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17316 static const MCOperandInfo OperandInfo643[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17316 static const MCOperandInfo OperandInfo643[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17316 static const MCOperandInfo OperandInfo643[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17322 static const MCOperandInfo OperandInfo649[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17322 static const MCOperandInfo OperandInfo649[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17322 static const MCOperandInfo OperandInfo649[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17323 static const MCOperandInfo OperandInfo650[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17323 static const MCOperandInfo OperandInfo650[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17323 static const MCOperandInfo OperandInfo650[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17324 static const MCOperandInfo OperandInfo651[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17324 static const MCOperandInfo OperandInfo651[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17324 static const MCOperandInfo OperandInfo651[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17324 static const MCOperandInfo OperandInfo651[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/X86/X86GenRegisterBank.inc 121 (1u << (X86::FR32RegClassID - 32)) |
gen/lib/Target/X86/X86GenRegisterInfo.inc 2622 { FR32, FR32Bits, 27, 16, sizeof(FR32Bits), X86::FR32RegClassID, 1, true },
6668 &X86MCRegisterClasses[FR32RegClassID],
lib/Target/X86/X86RegisterInfo.cpp 131 case X86::FR32RegClassID: