reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc
 7168     case X86::RDX: OpKind = MCK_RDX; break;
gen/lib/Target/X86/X86GenCallingConv.inc
  186         X86::RCX, X86::RDX, X86::R8, X86::R9
  210         X86::RDI, X86::RSI, X86::RDX, X86::RCX
 1457       X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9
 1741       X86::RBX, X86::R12, X86::RBP, X86::R15, X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9, X86::RAX, X86::R10, X86::R11, X86::R13, X86::R14
 1789       X86::R15, X86::RBP, X86::RSI, X86::RDX, X86::RCX, X86::R8
 1910       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
 1931         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
 2259           X86::RDX, X86::R8, X86::R9
 2274       X86::RCX, X86::RDX, X86::R8, X86::R9
 2297       X86::RCX, X86::RDX, X86::R8, X86::R9
 2373       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
 2394         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
 2710       X86::RAX, X86::RDX, X86::RCX
 3371       X86::RBX, X86::RBP, X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9, X86::RAX, X86::R10, X86::R11, X86::R13, X86::R14, X86::R15
 3401       X86::R15, X86::RBP, X86::RAX, X86::RDX
 3478       X86::RAX, X86::RDX, X86::RCX, X86::R8
 3651       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
 3672         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
 3851       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
 3872         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
gen/lib/Target/X86/X86GenInstrInfo.inc
16564 static const MCPhysReg ImplicitList2[] = { X86::RAX, X86::RCX, X86::RDX, 0 };
16565 static const MCPhysReg ImplicitList3[] = { X86::RAX, X86::RDX, X86::RBX, X86::EFLAGS, 0 };
16588 static const MCPhysReg ImplicitList26[] = { X86::RAX, X86::RBX, X86::RCX, X86::RDX, 0 };
16589 static const MCPhysReg ImplicitList27[] = { X86::RAX, X86::RDX, X86::EFLAGS, 0 };
16595 static const MCPhysReg ImplicitList33[] = { X86::RAX, X86::RDX, 0 };
16621 static const MCPhysReg ImplicitList59[] = { X86::RAX, X86::RDX, X86::RSI, 0 };
16624 static const MCPhysReg ImplicitList62[] = { X86::RDX, 0 };
16634 static const MCPhysReg ImplicitList72[] = { X86::RAX, X86::RBX, X86::RCX, X86::RDX, X86::EFLAGS, 0 };
16664 static const MCPhysReg ImplicitList102[] = { X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, X86::DF, 0 };
16666 static const MCPhysReg ImplicitList104[] = { X86::RBX, X86::RDX, X86::RSI, X86::RDI, 0 };
16672 static const MCPhysReg ImplicitList110[] = { X86::RDX, X86::RDI, 0 };
gen/lib/Target/X86/X86GenRegisterInfo.inc
 1963     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::RBX, X86::R14, X86::R15, X86::R12, X86::R13, X86::RBP, X86::RSP, X86::RIP, 
 1993     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::RBX, X86::R14, X86::R15, X86::R12, X86::R13, X86::RBP, X86::RSP, 
 2003     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::RBX, X86::R14, X86::R15, X86::R12, X86::R13, X86::RBP, 
 2013     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R11, X86::RIP, X86::RSP, 
 2023     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RBX, X86::RBP, X86::RSP, X86::RIP, 
 2033     X86::RAX, X86::RCX, X86::RDX, X86::R8, X86::R9, X86::R10, X86::R11, X86::RIP, X86::RSP, 
 2043     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R11, X86::RSP, 
 2053     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R11, 
 2063     X86::RAX, X86::RCX, X86::RDX, X86::R8, X86::R9, X86::R10, X86::R11, X86::RSP, 
 2073     X86::RAX, X86::RCX, X86::RDX, X86::R8, X86::R9, X86::R11, X86::RIP, X86::RSP, 
 2083     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RBX, X86::RBP, X86::RSP, 
 2113     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RBX, X86::RBP, 
 2123     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RSP, X86::RIP, 
 2133     X86::RAX, X86::RCX, X86::RDX, X86::R8, X86::R9, X86::R10, X86::R11, 
 2143     X86::RAX, X86::RCX, X86::RDX, X86::R8, X86::R9, X86::R11, X86::RSP, 
 2163     X86::RAX, X86::RCX, X86::RDX, X86::R8, X86::R9, X86::R11, 
 2173     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RSP, 
 2183     X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, 
 2193     X86::RAX, X86::RCX, X86::RDX, X86::RSP, X86::RIP, 
 2203     X86::RAX, X86::RCX, X86::RDX, X86::RBX, 
 2213     X86::RAX, X86::RCX, X86::RDX, X86::RSP, 
 2223     X86::RAX, X86::RCX, X86::RDX, 
 2233     X86::RAX, X86::RDX, 
 2283     X86::RCX, X86::RDX, 
 2333     X86::RDX, 
 2713   { 1U, X86::RDX },
 2880   { 1U, X86::RDX },
 3060   { X86::RDX, 1U },
 3210   { X86::RDX, -2U },
 3360   { X86::RDX, -2U },
 3510   { X86::RDX, 1U },
 3660   { X86::RDX, -2U },
 3810   { X86::RDX, -2U },
10016 static const MCPhysReg CSR_64EHRet_SaveList[] = { X86::RAX, X86::RDX, X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 };
10018 static const MCPhysReg CSR_64_AllRegs_SaveList[] = { X86::RBX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::RAX, 0 };
10020 static const MCPhysReg CSR_64_AllRegs_AVX_SaveList[] = { X86::RBX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::RAX, X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15, 0 };
10022 static const MCPhysReg CSR_64_AllRegs_AVX512_SaveList[] = { X86::RBX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::RAX, X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15, X86::ZMM16, X86::ZMM17, X86::ZMM18, X86::ZMM19, X86::ZMM20, X86::ZMM21, X86::ZMM22, X86::ZMM23, X86::ZMM24, X86::ZMM25, X86::ZMM26, X86::ZMM27, X86::ZMM28, X86::ZMM29, X86::ZMM30, X86::ZMM31, X86::K0, X86::K1, X86::K2, X86::K3, X86::K4, X86::K5, X86::K6, X86::K7, 0 };
10024 static const MCPhysReg CSR_64_AllRegs_NoSSE_SaveList[] = { X86::RAX, X86::RBX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, 0 };
10028 static const MCPhysReg CSR_64_CXX_TLS_Darwin_ViaCopy_SaveList[] = { X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RCX, X86::RDX, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, 0 };
10038 static const MCPhysReg CSR_64_MostRegs_SaveList[] = { X86::RBX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, 0 };
10040 static const MCPhysReg CSR_64_RT_AllRegs_SaveList[] = { X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::RSP, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, 0 };
10042 static const MCPhysReg CSR_64_RT_AllRegs_AVX_SaveList[] = { X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::RSP, X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15, 0 };
10044 static const MCPhysReg CSR_64_RT_MostRegs_SaveList[] = { X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::RSP, 0 };
10048 static const MCPhysReg CSR_64_TLS_Darwin_SaveList[] = { X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::RCX, X86::RDX, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, 0 };
lib/Target/X86/Disassembler/X86Disassembler.cpp
  270   static constexpr MCPhysReg llvmRegnums[] = {ALL_REGS};
  507   ALL_REGS
  552       ALL_SIB_BASES
  568       EA_BASES_64BIT
  645       ALL_EA_BASES
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
  159       {codeview::RegisterId::RDX, X86::RDX},
  620       case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
  632       case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
  669     case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
  705     case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
  741     case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX:
  742       return X86::RDX;
lib/Target/X86/X86CallingConv.cpp
   86   static const MCPhysReg RegListGPR[] = {X86::RCX, X86::RDX, X86::R8, X86::R9};
lib/Target/X86/X86FastISel.cpp
 1900     { &X86::GR64RegClass, X86::RAX, X86::RDX, {
 1902         { X86::IDIV64r, X86::CQO,     Copy,            X86::RDX, S }, // SRem
 1904         { X86::DIV64r,  X86::MOV32r0, Copy,            X86::RDX, U }, // URem
 3121     X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8 , X86::R9
lib/Target/X86/X86FrameLowering.cpp
  591                  CopyReg = InProlog ? X86::RDX
  593                  TestReg = InProlog ? X86::RDX
  595                  FinalReg = InProlog ? X86::RDX
  597                  RoundedReg = InProlog ? X86::RDX
  623     const bool IsRDXLiveIn = MBB.isLiveIn(X86::RDX);
  641           .addReg(X86::RDX);
  725                            TII.get(X86::MOV64rm), X86::RDX),
 1081     Establisher = Uses64BitFramePtr ? X86::RDX : X86::EDX;
lib/Target/X86/X86ISelDAGToDAG.cpp
 4733       SrcReg = LoReg = X86::RAX; HiReg = X86::RDX;
 4837       LoReg = X86::RAX; ClrReg = HiReg = X86::RDX;
lib/Target/X86/X86ISelLowering.cpp
 3123       X86::RCX, X86::RDX, X86::R8,  X86::R9
 3129     X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9
 3835         case X86::XMM1: ShadowReg = X86::RDX; break;
23821     HI = DAG.getCopyFromReg(LO.getValue(1), DL, X86::RDX, MVT::i64,
24292     return Subtarget.isTarget64BitLP64() ? X86::RDX : X86::EDX;
24301   return Subtarget.isTarget64BitLP64() ? X86::RDX : X86::EDX;
28293                              Regs64bit ? X86::RDX : X86::EDX,
28347                                         Regs64bit ? X86::RDX : X86::EDX,
46058         case X86::RDX:
lib/Target/X86/X86InstructionSelector.cpp
 1596        X86::RDX,
 1599            {X86::IDIV64r, X86::CQO, Copy, X86::RDX, S},    // SRem
 1601            {X86::DIV64r, X86::MOV32r0, Copy, X86::RDX, U}, // URem
lib/Target/X86/X86MCInstLower.cpp
 1435   const Register DestRegs[] = {X86::RDI, X86::RSI, X86::RDX};
unittests/tools/llvm-exegesis/X86/TargetTest.cpp
  176   const unsigned Reg = X86::RDX;