|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenDAGISel.inc71252 /*150292*/ OPC_EmitInteger, MVT::i32, X86::RFP80RegClassID,
71260 /*150308*/ OPC_EmitInteger, MVT::i32, X86::RFP80RegClassID,
gen/lib/Target/X86/X86GenGlobalISel.inc10948 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
10961 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
12793 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
12794 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
12795 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
13096 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
13097 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
13098 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
13399 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
13400 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
13401 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
13702 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
13703 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
13704 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
13922 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
13923 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
14007 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
14018 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
14101 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
14152 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
15041 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
15042 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
16709 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
16710 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
16760 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
16761 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
16915 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
16916 GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
gen/lib/Target/X86/X86GenInstrInfo.inc16748 static const MCOperandInfo OperandInfo75[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16748 static const MCOperandInfo OperandInfo75[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16770 static const MCOperandInfo OperandInfo97[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16770 static const MCOperandInfo OperandInfo97[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16770 static const MCOperandInfo OperandInfo97[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16771 static const MCOperandInfo OperandInfo98[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16771 static const MCOperandInfo OperandInfo98[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16812 static const MCOperandInfo OperandInfo139[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16812 static const MCOperandInfo OperandInfo139[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16812 static const MCOperandInfo OperandInfo139[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16822 static const MCOperandInfo OperandInfo149[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16822 static const MCOperandInfo OperandInfo149[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16822 static const MCOperandInfo OperandInfo149[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16869 static const MCOperandInfo OperandInfo196[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16872 static const MCOperandInfo OperandInfo199[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16912 static const MCOperandInfo OperandInfo239[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/X86/X86GenRegisterInfo.inc 2699 { RFP80, RFP80Bits, 0, 7, sizeof(RFP80Bits), X86::RFP80RegClassID, 1, true },
7592 &X86MCRegisterClasses[RFP80RegClassID],
lib/Target/X86/X86RegisterInfo.cpp 165 case X86::RFP80RegClassID: