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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 5039 Inst.addOperand(MCOperand::createReg(X86::ST1));
7305 case X86::ST1: OpKind = MCK_RST; break;
gen/lib/Target/X86/X86GenInstrInfo.inc16599 static const MCPhysReg ImplicitList37[] = { X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, 0 };
16663 static const MCPhysReg ImplicitList101[] = { X86::EAX, X86::ECX, X86::EDX, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, X86::DF, 0 };
16664 static const MCPhysReg ImplicitList102[] = { X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, X86::DF, 0 };
gen/lib/Target/X86/X86GenRegisterInfo.inc 1269 { X86::ST1 },
2393 X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7,
2746 { 34U, X86::ST1 },
2799 { 13U, X86::ST1 },
2844 { 12U, X86::ST1 },
2913 { 34U, X86::ST1 },
2966 { 13U, X86::ST1 },
3011 { 12U, X86::ST1 },
3089 { X86::ST1, 34U },
3239 { X86::ST1, 13U },
3389 { X86::ST1, 12U },
3539 { X86::ST1, 34U },
3689 { X86::ST1, 13U },
3839 { X86::ST1, 12U },
lib/Target/X86/AsmParser/X86AsmParser.cpp 1153 case 1: RegNo = X86::ST1; break;
unittests/tools/llvm-exegesis/X86/TargetTest.cpp 302 const MCInst CopySt0ToSt1 = MCInstBuilder(X86::ST_Frr).addReg(X86::ST1);
303 EXPECT_THAT(setRegTo(X86::ST1, APInt(32, 0x11112222ULL)),