reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenGlobalISel.inc
 1457       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 1458       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 1459       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 1541       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 1542       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 1543       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 1585       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 1586       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 1587       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 1600       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 1601       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 1602       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 2001       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 2002       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 2003       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 2085       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 2086       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 2087       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 2129       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 2130       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 2131       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 2144       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 2145       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 2146       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 2468       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 2469       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 2470       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 2512       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 2513       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 2514       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 2527       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 2528       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 2529       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 3780       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 3781       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 3782       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 3890       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 3891       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 3892       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 3960       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 3961       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 3962       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 3990       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 3991       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 3992       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 5354       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 5355       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 5356       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 5464       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 5465       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 5466       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 5534       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 5535       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 5536       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 5564       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 5565       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 5566       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 6676       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 6677       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 6678       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 6786       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 6787       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 6788       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 6856       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 6857       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 6858       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 6886       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 6887       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
 6888       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 8535         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 8536         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 8537         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID,
 8592         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 8593         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 8594         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID,
 8649         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 8650         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 8651         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID,
 8706         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 8707         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 8708         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID,
 9081         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
 9082         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
 9083         GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID,
10450       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10527       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10553       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10566       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10653       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10677       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10690       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10733       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10746       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
11178       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11189       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11200       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11299       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11310       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11321       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11347       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11358       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11371       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11621       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11632       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11671       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11682       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11695       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12569       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12570       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12571       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
12660       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12661       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12662       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
12948       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12949       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12950       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
12963       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12964       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12965       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
13251       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13252       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13253       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
13266       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13267       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13268       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
13554       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13555       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13556       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
13569       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13570       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13571       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
13857       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13858       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13859       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
13872       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13873       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13874       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
14057       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
14191       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
14742       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
14754       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
14765       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
14766       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
14778       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
14779       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
14956       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
14968       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
14979       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
14980       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
14992       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
14993       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15212       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15213       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15214       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15296       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15297       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15298       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15340       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15341       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15342       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15355       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15356       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15357       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15525       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15526       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15527       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15609       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15610       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15611       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15653       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15654       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15655       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15668       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15669       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15670       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15838       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15839       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15840       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15922       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15923       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15924       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15966       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15967       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15968       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
15981       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
15982       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
15983       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
16151       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
16152       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
16153       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
16235       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
16236       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
16237       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
16279       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
16280       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
16281       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
16294       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
16295       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
16296       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
16427       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
16428       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
16440       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
16441       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
16534       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
16535       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
16573       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
16574       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
16599       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
16600       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
16612       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
16613       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
17054       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
17055       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
17067       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
17068       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
gen/lib/Target/X86/X86GenInstrInfo.inc
16720 static const MCOperandInfo OperandInfo47[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16721 static const MCOperandInfo OperandInfo48[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16722 static const MCOperandInfo OperandInfo49[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
16833 static const MCOperandInfo OperandInfo160[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16833 static const MCOperandInfo OperandInfo160[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16833 static const MCOperandInfo OperandInfo160[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
16995 static const MCOperandInfo OperandInfo322[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16995 static const MCOperandInfo OperandInfo322[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16995 static const MCOperandInfo OperandInfo322[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16996 static const MCOperandInfo OperandInfo323[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16996 static const MCOperandInfo OperandInfo323[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
16996 static const MCOperandInfo OperandInfo323[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17014 static const MCOperandInfo OperandInfo341[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17014 static const MCOperandInfo OperandInfo341[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17015 static const MCOperandInfo OperandInfo342[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17015 static const MCOperandInfo OperandInfo342[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17015 static const MCOperandInfo OperandInfo342[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17016 static const MCOperandInfo OperandInfo343[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17016 static const MCOperandInfo OperandInfo343[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17017 static const MCOperandInfo OperandInfo344[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17017 static const MCOperandInfo OperandInfo344[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17017 static const MCOperandInfo OperandInfo344[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17018 static const MCOperandInfo OperandInfo345[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17018 static const MCOperandInfo OperandInfo345[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17018 static const MCOperandInfo OperandInfo345[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17019 static const MCOperandInfo OperandInfo346[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17019 static const MCOperandInfo OperandInfo346[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17019 static const MCOperandInfo OperandInfo346[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17019 static const MCOperandInfo OperandInfo346[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17020 static const MCOperandInfo OperandInfo347[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17020 static const MCOperandInfo OperandInfo347[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17020 static const MCOperandInfo OperandInfo347[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17021 static const MCOperandInfo OperandInfo348[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17021 static const MCOperandInfo OperandInfo348[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17021 static const MCOperandInfo OperandInfo348[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17021 static const MCOperandInfo OperandInfo348[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17022 static const MCOperandInfo OperandInfo349[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17022 static const MCOperandInfo OperandInfo349[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17022 static const MCOperandInfo OperandInfo349[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17033 static const MCOperandInfo OperandInfo360[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17033 static const MCOperandInfo OperandInfo360[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17034 static const MCOperandInfo OperandInfo361[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17034 static const MCOperandInfo OperandInfo361[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17034 static const MCOperandInfo OperandInfo361[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17034 static const MCOperandInfo OperandInfo361[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17035 static const MCOperandInfo OperandInfo362[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17035 static const MCOperandInfo OperandInfo362[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17035 static const MCOperandInfo OperandInfo362[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17036 static const MCOperandInfo OperandInfo363[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17036 static const MCOperandInfo OperandInfo363[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17036 static const MCOperandInfo OperandInfo363[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17036 static const MCOperandInfo OperandInfo363[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17037 static const MCOperandInfo OperandInfo364[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17037 static const MCOperandInfo OperandInfo364[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17037 static const MCOperandInfo OperandInfo364[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17062 static const MCOperandInfo OperandInfo389[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17062 static const MCOperandInfo OperandInfo389[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17063 static const MCOperandInfo OperandInfo390[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17063 static const MCOperandInfo OperandInfo390[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17063 static const MCOperandInfo OperandInfo390[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17064 static const MCOperandInfo OperandInfo391[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17064 static const MCOperandInfo OperandInfo391[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17065 static const MCOperandInfo OperandInfo392[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17065 static const MCOperandInfo OperandInfo392[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17065 static const MCOperandInfo OperandInfo392[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17065 static const MCOperandInfo OperandInfo392[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17066 static const MCOperandInfo OperandInfo393[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17066 static const MCOperandInfo OperandInfo393[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17066 static const MCOperandInfo OperandInfo393[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17075 static const MCOperandInfo OperandInfo402[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17075 static const MCOperandInfo OperandInfo402[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17075 static const MCOperandInfo OperandInfo402[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17076 static const MCOperandInfo OperandInfo403[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17076 static const MCOperandInfo OperandInfo403[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17077 static const MCOperandInfo OperandInfo404[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17077 static const MCOperandInfo OperandInfo404[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17077 static const MCOperandInfo OperandInfo404[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17077 static const MCOperandInfo OperandInfo404[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17078 static const MCOperandInfo OperandInfo405[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17078 static const MCOperandInfo OperandInfo405[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17078 static const MCOperandInfo OperandInfo405[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17092 static const MCOperandInfo OperandInfo419[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17093 static const MCOperandInfo OperandInfo420[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17093 static const MCOperandInfo OperandInfo420[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17094 static const MCOperandInfo OperandInfo421[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17095 static const MCOperandInfo OperandInfo422[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17096 static const MCOperandInfo OperandInfo423[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17096 static const MCOperandInfo OperandInfo423[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17097 static const MCOperandInfo OperandInfo424[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17100 static const MCOperandInfo OperandInfo427[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17100 static const MCOperandInfo OperandInfo427[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17101 static const MCOperandInfo OperandInfo428[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17110 static const MCOperandInfo OperandInfo437[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17110 static const MCOperandInfo OperandInfo437[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17111 static const MCOperandInfo OperandInfo438[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17120 static const MCOperandInfo OperandInfo447[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17121 static const MCOperandInfo OperandInfo448[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17122 static const MCOperandInfo OperandInfo449[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17122 static const MCOperandInfo OperandInfo449[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17123 static const MCOperandInfo OperandInfo450[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17123 static const MCOperandInfo OperandInfo450[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17132 static const MCOperandInfo OperandInfo459[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17133 static const MCOperandInfo OperandInfo460[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17134 static const MCOperandInfo OperandInfo461[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17134 static const MCOperandInfo OperandInfo461[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17135 static const MCOperandInfo OperandInfo462[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17135 static const MCOperandInfo OperandInfo462[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17157 static const MCOperandInfo OperandInfo484[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17158 static const MCOperandInfo OperandInfo485[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17159 static const MCOperandInfo OperandInfo486[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17159 static const MCOperandInfo OperandInfo486[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17160 static const MCOperandInfo OperandInfo487[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17160 static const MCOperandInfo OperandInfo487[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17160 static const MCOperandInfo OperandInfo487[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17161 static const MCOperandInfo OperandInfo488[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17161 static const MCOperandInfo OperandInfo488[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17166 static const MCOperandInfo OperandInfo493[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17167 static const MCOperandInfo OperandInfo494[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17167 static const MCOperandInfo OperandInfo494[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17167 static const MCOperandInfo OperandInfo494[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17168 static const MCOperandInfo OperandInfo495[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17168 static const MCOperandInfo OperandInfo495[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17171 static const MCOperandInfo OperandInfo498[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17172 static const MCOperandInfo OperandInfo499[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17172 static const MCOperandInfo OperandInfo499[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17173 static const MCOperandInfo OperandInfo500[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17175 static const MCOperandInfo OperandInfo502[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17175 static const MCOperandInfo OperandInfo502[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17176 static const MCOperandInfo OperandInfo503[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17176 static const MCOperandInfo OperandInfo503[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17176 static const MCOperandInfo OperandInfo503[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17177 static const MCOperandInfo OperandInfo504[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17177 static const MCOperandInfo OperandInfo504[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17186 static const MCOperandInfo OperandInfo513[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17186 static const MCOperandInfo OperandInfo513[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17186 static const MCOperandInfo OperandInfo513[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17187 static const MCOperandInfo OperandInfo514[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17187 static const MCOperandInfo OperandInfo514[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17188 static const MCOperandInfo OperandInfo515[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17188 static const MCOperandInfo OperandInfo515[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17188 static const MCOperandInfo OperandInfo515[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17188 static const MCOperandInfo OperandInfo515[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17189 static const MCOperandInfo OperandInfo516[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17189 static const MCOperandInfo OperandInfo516[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17189 static const MCOperandInfo OperandInfo516[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17197 static const MCOperandInfo OperandInfo524[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17198 static const MCOperandInfo OperandInfo525[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17199 static const MCOperandInfo OperandInfo526[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17203 static const MCOperandInfo OperandInfo530[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17204 static const MCOperandInfo OperandInfo531[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17205 static const MCOperandInfo OperandInfo532[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17206 static const MCOperandInfo OperandInfo533[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17207 static const MCOperandInfo OperandInfo534[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17208 static const MCOperandInfo OperandInfo535[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17208 static const MCOperandInfo OperandInfo535[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17208 static const MCOperandInfo OperandInfo535[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17209 static const MCOperandInfo OperandInfo536[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17209 static const MCOperandInfo OperandInfo536[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17210 static const MCOperandInfo OperandInfo537[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17210 static const MCOperandInfo OperandInfo537[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17211 static const MCOperandInfo OperandInfo538[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17224 static const MCOperandInfo OperandInfo551[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17225 static const MCOperandInfo OperandInfo552[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17226 static const MCOperandInfo OperandInfo553[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17227 static const MCOperandInfo OperandInfo554[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17228 static const MCOperandInfo OperandInfo555[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17229 static const MCOperandInfo OperandInfo556[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17230 static const MCOperandInfo OperandInfo557[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17230 static const MCOperandInfo OperandInfo557[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17231 static const MCOperandInfo OperandInfo558[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17266 static const MCOperandInfo OperandInfo593[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17266 static const MCOperandInfo OperandInfo593[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17266 static const MCOperandInfo OperandInfo593[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17267 static const MCOperandInfo OperandInfo594[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17267 static const MCOperandInfo OperandInfo594[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17268 static const MCOperandInfo OperandInfo595[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17268 static const MCOperandInfo OperandInfo595[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17268 static const MCOperandInfo OperandInfo595[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17268 static const MCOperandInfo OperandInfo595[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17269 static const MCOperandInfo OperandInfo596[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17269 static const MCOperandInfo OperandInfo596[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17269 static const MCOperandInfo OperandInfo596[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17273 static const MCOperandInfo OperandInfo600[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17273 static const MCOperandInfo OperandInfo600[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17273 static const MCOperandInfo OperandInfo600[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17273 static const MCOperandInfo OperandInfo600[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17277 static const MCOperandInfo OperandInfo604[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17278 static const MCOperandInfo OperandInfo605[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17279 static const MCOperandInfo OperandInfo606[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17280 static const MCOperandInfo OperandInfo607[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17281 static const MCOperandInfo OperandInfo608[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17282 static const MCOperandInfo OperandInfo609[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17283 static const MCOperandInfo OperandInfo610[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17287 static const MCOperandInfo OperandInfo614[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17288 static const MCOperandInfo OperandInfo615[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17289 static const MCOperandInfo OperandInfo616[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17290 static const MCOperandInfo OperandInfo617[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17291 static const MCOperandInfo OperandInfo618[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17297 static const MCOperandInfo OperandInfo624[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17297 static const MCOperandInfo OperandInfo624[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17297 static const MCOperandInfo OperandInfo624[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17298 static const MCOperandInfo OperandInfo625[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17298 static const MCOperandInfo OperandInfo625[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17298 static const MCOperandInfo OperandInfo625[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17298 static const MCOperandInfo OperandInfo625[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17303 static const MCOperandInfo OperandInfo630[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17303 static const MCOperandInfo OperandInfo630[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17303 static const MCOperandInfo OperandInfo630[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17303 static const MCOperandInfo OperandInfo630[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, };
17335 static const MCOperandInfo OperandInfo662[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17336 static const MCOperandInfo OperandInfo663[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17343 static const MCOperandInfo OperandInfo670[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17344 static const MCOperandInfo OperandInfo671[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17352 static const MCOperandInfo OperandInfo679[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17352 static const MCOperandInfo OperandInfo679[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17357 static const MCOperandInfo OperandInfo684[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17357 static const MCOperandInfo OperandInfo684[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17357 static const MCOperandInfo OperandInfo684[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17359 static const MCOperandInfo OperandInfo686[] = { { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17360 static const MCOperandInfo OperandInfo687[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17362 static const MCOperandInfo OperandInfo689[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17362 static const MCOperandInfo OperandInfo689[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17362 static const MCOperandInfo OperandInfo689[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17365 static const MCOperandInfo OperandInfo692[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17377 static const MCOperandInfo OperandInfo704[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17378 static const MCOperandInfo OperandInfo705[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17378 static const MCOperandInfo OperandInfo705[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17379 static const MCOperandInfo OperandInfo706[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17380 static const MCOperandInfo OperandInfo707[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17380 static const MCOperandInfo OperandInfo707[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17381 static const MCOperandInfo OperandInfo708[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17381 static const MCOperandInfo OperandInfo708[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17381 static const MCOperandInfo OperandInfo708[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17382 static const MCOperandInfo OperandInfo709[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17382 static const MCOperandInfo OperandInfo709[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17389 static const MCOperandInfo OperandInfo716[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17389 static const MCOperandInfo OperandInfo716[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17390 static const MCOperandInfo OperandInfo717[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17391 static const MCOperandInfo OperandInfo718[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17391 static const MCOperandInfo OperandInfo718[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17391 static const MCOperandInfo OperandInfo718[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17392 static const MCOperandInfo OperandInfo719[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17392 static const MCOperandInfo OperandInfo719[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17403 static const MCOperandInfo OperandInfo730[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17403 static const MCOperandInfo OperandInfo730[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17403 static const MCOperandInfo OperandInfo730[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17404 static const MCOperandInfo OperandInfo731[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17404 static const MCOperandInfo OperandInfo731[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17405 static const MCOperandInfo OperandInfo732[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17405 static const MCOperandInfo OperandInfo732[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17405 static const MCOperandInfo OperandInfo732[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17405 static const MCOperandInfo OperandInfo732[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17406 static const MCOperandInfo OperandInfo733[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17406 static const MCOperandInfo OperandInfo733[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17406 static const MCOperandInfo OperandInfo733[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17415 static const MCOperandInfo OperandInfo742[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17415 static const MCOperandInfo OperandInfo742[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17415 static const MCOperandInfo OperandInfo742[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17416 static const MCOperandInfo OperandInfo743[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17416 static const MCOperandInfo OperandInfo743[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17417 static const MCOperandInfo OperandInfo744[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17417 static const MCOperandInfo OperandInfo744[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17417 static const MCOperandInfo OperandInfo744[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17417 static const MCOperandInfo OperandInfo744[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17418 static const MCOperandInfo OperandInfo745[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17418 static const MCOperandInfo OperandInfo745[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17418 static const MCOperandInfo OperandInfo745[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17423 static const MCOperandInfo OperandInfo750[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17423 static const MCOperandInfo OperandInfo750[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17424 static const MCOperandInfo OperandInfo751[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17424 static const MCOperandInfo OperandInfo751[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17424 static const MCOperandInfo OperandInfo751[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17425 static const MCOperandInfo OperandInfo752[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17425 static const MCOperandInfo OperandInfo752[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17426 static const MCOperandInfo OperandInfo753[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17426 static const MCOperandInfo OperandInfo753[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17427 static const MCOperandInfo OperandInfo754[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17427 static const MCOperandInfo OperandInfo754[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17427 static const MCOperandInfo OperandInfo754[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17428 static const MCOperandInfo OperandInfo755[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17428 static const MCOperandInfo OperandInfo755[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17431 static const MCOperandInfo OperandInfo758[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17431 static const MCOperandInfo OperandInfo758[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17431 static const MCOperandInfo OperandInfo758[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17432 static const MCOperandInfo OperandInfo759[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17432 static const MCOperandInfo OperandInfo759[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17433 static const MCOperandInfo OperandInfo760[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17433 static const MCOperandInfo OperandInfo760[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17433 static const MCOperandInfo OperandInfo760[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17434 static const MCOperandInfo OperandInfo761[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17434 static const MCOperandInfo OperandInfo761[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17448 static const MCOperandInfo OperandInfo775[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17449 static const MCOperandInfo OperandInfo776[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17449 static const MCOperandInfo OperandInfo776[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17450 static const MCOperandInfo OperandInfo777[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17451 static const MCOperandInfo OperandInfo778[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17451 static const MCOperandInfo OperandInfo778[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17451 static const MCOperandInfo OperandInfo778[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17452 static const MCOperandInfo OperandInfo779[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17452 static const MCOperandInfo OperandInfo779[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17463 static const MCOperandInfo OperandInfo790[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17464 static const MCOperandInfo OperandInfo791[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17464 static const MCOperandInfo OperandInfo791[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17465 static const MCOperandInfo OperandInfo792[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17466 static const MCOperandInfo OperandInfo793[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17466 static const MCOperandInfo OperandInfo793[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17466 static const MCOperandInfo OperandInfo793[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17467 static const MCOperandInfo OperandInfo794[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17467 static const MCOperandInfo OperandInfo794[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17478 static const MCOperandInfo OperandInfo805[] = { { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17479 static const MCOperandInfo OperandInfo806[] = { { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17479 static const MCOperandInfo OperandInfo806[] = { { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17484 static const MCOperandInfo OperandInfo811[] = { { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17485 static const MCOperandInfo OperandInfo812[] = { { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17485 static const MCOperandInfo OperandInfo812[] = { { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17488 static const MCOperandInfo OperandInfo815[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17488 static const MCOperandInfo OperandInfo815[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17489 static const MCOperandInfo OperandInfo816[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17495 static const MCOperandInfo OperandInfo822[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17496 static const MCOperandInfo OperandInfo823[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17496 static const MCOperandInfo OperandInfo823[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17497 static const MCOperandInfo OperandInfo824[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17502 static const MCOperandInfo OperandInfo829[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17502 static const MCOperandInfo OperandInfo829[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17503 static const MCOperandInfo OperandInfo830[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17506 static const MCOperandInfo OperandInfo833[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17509 static const MCOperandInfo OperandInfo836[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17515 static const MCOperandInfo OperandInfo842[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17516 static const MCOperandInfo OperandInfo843[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17516 static const MCOperandInfo OperandInfo843[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17517 static const MCOperandInfo OperandInfo844[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17520 static const MCOperandInfo OperandInfo847[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17520 static const MCOperandInfo OperandInfo847[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17521 static const MCOperandInfo OperandInfo848[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17526 static const MCOperandInfo OperandInfo853[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17526 static const MCOperandInfo OperandInfo853[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17527 static const MCOperandInfo OperandInfo854[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17536 static const MCOperandInfo OperandInfo863[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17537 static const MCOperandInfo OperandInfo864[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17538 static const MCOperandInfo OperandInfo865[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17538 static const MCOperandInfo OperandInfo865[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17539 static const MCOperandInfo OperandInfo866[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17539 static const MCOperandInfo OperandInfo866[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17548 static const MCOperandInfo OperandInfo875[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17549 static const MCOperandInfo OperandInfo876[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17550 static const MCOperandInfo OperandInfo877[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17550 static const MCOperandInfo OperandInfo877[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17551 static const MCOperandInfo OperandInfo878[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17551 static const MCOperandInfo OperandInfo878[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17560 static const MCOperandInfo OperandInfo887[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17561 static const MCOperandInfo OperandInfo888[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17562 static const MCOperandInfo OperandInfo889[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17562 static const MCOperandInfo OperandInfo889[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17563 static const MCOperandInfo OperandInfo890[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17563 static const MCOperandInfo OperandInfo890[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17572 static const MCOperandInfo OperandInfo899[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17573 static const MCOperandInfo OperandInfo900[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17574 static const MCOperandInfo OperandInfo901[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17574 static const MCOperandInfo OperandInfo901[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17575 static const MCOperandInfo OperandInfo902[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17575 static const MCOperandInfo OperandInfo902[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17584 static const MCOperandInfo OperandInfo911[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17585 static const MCOperandInfo OperandInfo912[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, };
17586 static const MCOperandInfo OperandInfo913[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17586 static const MCOperandInfo OperandInfo913[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17587 static const MCOperandInfo OperandInfo914[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17587 static const MCOperandInfo OperandInfo914[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17596 static const MCOperandInfo OperandInfo923[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17597 static const MCOperandInfo OperandInfo924[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17598 static const MCOperandInfo OperandInfo925[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17598 static const MCOperandInfo OperandInfo925[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17599 static const MCOperandInfo OperandInfo926[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17599 static const MCOperandInfo OperandInfo926[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17615 static const MCOperandInfo OperandInfo942[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17618 static const MCOperandInfo OperandInfo945[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17619 static const MCOperandInfo OperandInfo946[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17620 static const MCOperandInfo OperandInfo947[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17621 static const MCOperandInfo OperandInfo948[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17623 static const MCOperandInfo OperandInfo950[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17627 static const MCOperandInfo OperandInfo954[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17630 static const MCOperandInfo OperandInfo957[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17631 static const MCOperandInfo OperandInfo958[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17632 static const MCOperandInfo OperandInfo959[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17635 static const MCOperandInfo OperandInfo962[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17636 static const MCOperandInfo OperandInfo963[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17637 static const MCOperandInfo OperandInfo964[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17637 static const MCOperandInfo OperandInfo964[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17638 static const MCOperandInfo OperandInfo965[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17641 static const MCOperandInfo OperandInfo968[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17645 static const MCOperandInfo OperandInfo972[] = { { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17645 static const MCOperandInfo OperandInfo972[] = { { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17648 static const MCOperandInfo OperandInfo975[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17650 static const MCOperandInfo OperandInfo977[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17652 static const MCOperandInfo OperandInfo979[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17652 static const MCOperandInfo OperandInfo979[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17661 static const MCOperandInfo OperandInfo988[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17661 static const MCOperandInfo OperandInfo988[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17662 static const MCOperandInfo OperandInfo989[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17663 static const MCOperandInfo OperandInfo990[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17663 static const MCOperandInfo OperandInfo990[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17663 static const MCOperandInfo OperandInfo990[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17664 static const MCOperandInfo OperandInfo991[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17664 static const MCOperandInfo OperandInfo991[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
17669 static const MCOperandInfo OperandInfo996[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17669 static const MCOperandInfo OperandInfo996[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17670 static const MCOperandInfo OperandInfo997[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17670 static const MCOperandInfo OperandInfo997[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17670 static const MCOperandInfo OperandInfo997[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17671 static const MCOperandInfo OperandInfo998[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17671 static const MCOperandInfo OperandInfo998[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17674 static const MCOperandInfo OperandInfo1001[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17674 static const MCOperandInfo OperandInfo1001[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17674 static const MCOperandInfo OperandInfo1001[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17675 static const MCOperandInfo OperandInfo1002[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17675 static const MCOperandInfo OperandInfo1002[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17678 static const MCOperandInfo OperandInfo1005[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17678 static const MCOperandInfo OperandInfo1005[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17678 static const MCOperandInfo OperandInfo1005[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17679 static const MCOperandInfo OperandInfo1006[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
17679 static const MCOperandInfo OperandInfo1006[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
gen/lib/Target/X86/X86GenRegisterBank.inc
  128     (1u << (X86::VR512RegClassID - 96)) |
gen/lib/Target/X86/X86GenRegisterInfo.inc
 2706   { VR512, VR512Bits, 10, 32, sizeof(VR512Bits), X86::VR512RegClassID, 1, true },
 7676     &X86MCRegisterClasses[VR512RegClassID],
lib/Target/X86/AsmParser/X86AsmParser.cpp
 1022         X86MCRegisterClasses[X86::VR512RegClassID].contains(IndexReg))) {
 1924         X86MCRegisterClasses[X86::VR512RegClassID].contains(IndexReg)) &&
 1927        X86MCRegisterClasses[X86::VR512RegClassID].contains(BaseReg)))
lib/Target/X86/X86MCInstLower.cpp
 1825   if (Info.RegClass == X86::VR512RegClassID)
lib/Target/X86/X86RegisterInfo.cpp
  167     case X86::VR512RegClassID: