|
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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/X86/X86GenAsmMatcher.inc 7232 case X86::YMM0: OpKind = MCK_VR256; break;
gen/lib/Target/X86/X86GenCallingConv.inc 245 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
921 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7
1191 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
1255 X86::YMM0, X86::YMM1, X86::YMM2
1568 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7
1993 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
2456 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
2605 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
2800 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
3161 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7
3737 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
3937 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
gen/lib/Target/X86/X86GenInstrInfo.inc16665 static const MCPhysReg ImplicitList103[] = { X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15, 0 };
gen/lib/Target/X86/X86GenRegisterInfo.inc 2453 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15, X86::YMM16, X86::YMM17, X86::YMM18, X86::YMM19, X86::YMM20, X86::YMM21, X86::YMM22, X86::YMM23, X86::YMM24, X86::YMM25, X86::YMM26, X86::YMM27, X86::YMM28, X86::YMM29, X86::YMM30, X86::YMM31,
2463 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15,
3128 { X86::YMM0, 17U },
3278 { X86::YMM0, 21U },
3428 { X86::YMM0, 21U },
3578 { X86::YMM0, 17U },
3728 { X86::YMM0, 21U },
3878 { X86::YMM0, 21U },
10004 static const MCPhysReg CSR_32_AllRegs_AVX_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, 0 };
10020 static const MCPhysReg CSR_64_AllRegs_AVX_SaveList[] = { X86::RBX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::RAX, X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15, 0 };
10042 static const MCPhysReg CSR_64_RT_AllRegs_AVX_SaveList[] = { X86::RBX, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::RSP, X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15, 0 };
lib/Target/X86/AsmParser/X86Operand.h 329 return isMem128() && isMemIndexReg(X86::YMM0, X86::YMM15);
335 return isMem256() && isMemIndexReg(X86::YMM0, X86::YMM15);
345 return isMem128() && isMemIndexReg(X86::YMM0, X86::YMM31);
351 return isMem256() && isMemIndexReg(X86::YMM0, X86::YMM31);
357 return isMem512() && isMemIndexReg(X86::YMM0, X86::YMM31);
lib/Target/X86/Disassembler/X86Disassembler.cpp 270 static constexpr MCPhysReg llvmRegnums[] = {ALL_REGS};
456 mcInst.addOperand(MCOperand::createReg(X86::YMM0 + (immediate >> 4)));
507 ALL_REGS
570 REGS_YMM
lib/Target/X86/MCTargetDesc/X86InstComments.cpp 205 if (X86::YMM0 <= RegNo && RegNo <= X86::YMM31)
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp 196 {codeview::RegisterId::AMD64_YMM0, X86::YMM0},
lib/Target/X86/X86CallingConv.cpp 75 static const MCPhysReg RegListYMM[] = {X86::YMM0, X86::YMM1, X86::YMM2,
lib/Target/X86/X86VZeroUpper.cpp 129 return (Reg >= X86::YMM0 && Reg <= X86::YMM15) ||
142 for (unsigned reg = X86::YMM0; reg <= X86::YMM15; ++reg) {
unittests/tools/llvm-exegesis/X86/TargetTest.cpp 230 setRegTo(X86::YMM0, APInt(256, ValueStr, 16)),
240 IsMovValueFromStack(X86::VMOVDQUYrm, X86::YMM0),
248 setRegTo(X86::YMM0, APInt(256, ValueStr, 16)),
258 IsMovValueFromStack(X86::VMOVDQU32Z256rm, X86::YMM0),