reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/X86/X86GenAsmMatcher.inc

 7264     case X86::ZMM0: OpKind = MCK_VR512_0_15; break;

gen/lib/Target/X86/X86GenCallingConv.inc

  258       X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
  938         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7
 1209         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
 1273         X86::ZMM0, X86::ZMM1, X86::ZMM2
 1587           X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7
 2010         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
 2473         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
 2618       X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
 2815       X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
 3178         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7
 3754         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
 3954         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15

gen/lib/Target/X86/X86GenRegisterInfo.inc

 2473     X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15, X86::ZMM16, X86::ZMM17, X86::ZMM18, X86::ZMM19, X86::ZMM20, X86::ZMM21, X86::ZMM22, X86::ZMM23, X86::ZMM24, X86::ZMM25, X86::ZMM26, X86::ZMM27, X86::ZMM28, X86::ZMM29, X86::ZMM30, X86::ZMM31, 
 2483     X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15, 
 3160   { X86::ZMM0, 17U },
 3310   { X86::ZMM0, 21U },
 3460   { X86::ZMM0, 21U },
 3610   { X86::ZMM0, 17U },
 3760   { X86::ZMM0, 21U },
 3910   { X86::ZMM0, 21U },
10006 static const MCPhysReg CSR_32_AllRegs_AVX512_SaveList[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EBP, X86::ESI, X86::EDI, X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::K0, X86::K1, X86::K2, X86::K3, X86::K4, X86::K5, X86::K6, X86::K7, 0 };
10022 static const MCPhysReg CSR_64_AllRegs_AVX512_SaveList[] = { X86::RBX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::RAX, X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15, X86::ZMM16, X86::ZMM17, X86::ZMM18, X86::ZMM19, X86::ZMM20, X86::ZMM21, X86::ZMM22, X86::ZMM23, X86::ZMM24, X86::ZMM25, X86::ZMM26, X86::ZMM27, X86::ZMM28, X86::ZMM29, X86::ZMM30, X86::ZMM31, X86::K0, X86::K1, X86::K2, X86::K3, X86::K4, X86::K5, X86::K6, X86::K7, 0 };

lib/Target/X86/AsmParser/X86Operand.h

  354     return isMem256() && isMemIndexReg(X86::ZMM0, X86::ZMM31);
  360     return isMem512() && isMemIndexReg(X86::ZMM0, X86::ZMM31);

lib/Target/X86/Disassembler/X86Disassembler.cpp

  270   static constexpr MCPhysReg llvmRegnums[] = {ALL_REGS};
  459     mcInst.addOperand(MCOperand::createReg(X86::ZMM0 + (immediate >> 4)));
  507   ALL_REGS
  571       REGS_ZMM

lib/Target/X86/MCTargetDesc/X86InstComments.cpp

  203   if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31)

lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp

  228       {codeview::RegisterId::AMD64_ZMM0, X86::ZMM0},

lib/Target/X86/X86CallingConv.cpp

   69     static const MCPhysReg RegListZMM[] = {X86::ZMM0, X86::ZMM1, X86::ZMM2,

lib/Target/X86/X86EvexToVex.cpp

  136     assert(!(Reg >= X86::ZMM0 && Reg <= X86::ZMM31) &&

lib/Target/X86/X86VZeroUpper.cpp

  130          (Reg >= X86::ZMM0 && Reg <= X86::ZMM15);
  146   for (unsigned reg = X86::ZMM0; reg <= X86::ZMM15; ++reg) {

unittests/tools/llvm-exegesis/X86/TargetTest.cpp

  267       setRegTo(X86::ZMM0, APInt(512, ValueStr, 16)),
  285                         IsMovValueFromStack(X86::VMOVDQU32Zrm, X86::ZMM0),