|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/X86/X86GenAsmMatcher.inc 7295 case X86::ZMM31: OpKind = MCK_VR512; break;
gen/lib/Target/X86/X86GenRegisterInfo.inc 2473 X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15, X86::ZMM16, X86::ZMM17, X86::ZMM18, X86::ZMM19, X86::ZMM20, X86::ZMM21, X86::ZMM22, X86::ZMM23, X86::ZMM24, X86::ZMM25, X86::ZMM26, X86::ZMM27, X86::ZMM28, X86::ZMM29, X86::ZMM30, X86::ZMM31,
3191 { X86::ZMM31, 82U },
3341 { X86::ZMM31, -2U },
3491 { X86::ZMM31, -2U },
3641 { X86::ZMM31, 82U },
3791 { X86::ZMM31, -2U },
3941 { X86::ZMM31, -2U },
10022 static const MCPhysReg CSR_64_AllRegs_AVX512_SaveList[] = { X86::RBX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R13, X86::R14, X86::R15, X86::RBP, X86::RAX, X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15, X86::ZMM16, X86::ZMM17, X86::ZMM18, X86::ZMM19, X86::ZMM20, X86::ZMM21, X86::ZMM22, X86::ZMM23, X86::ZMM24, X86::ZMM25, X86::ZMM26, X86::ZMM27, X86::ZMM28, X86::ZMM29, X86::ZMM30, X86::ZMM31, X86::K0, X86::K1, X86::K2, X86::K3, X86::K4, X86::K5, X86::K6, X86::K7, 0 };
10036 static const MCPhysReg CSR_64_Intel_OCL_BI_AVX512_SaveList[] = { X86::RBX, X86::RDI, X86::RSI, X86::R14, X86::R15, X86::ZMM16, X86::ZMM17, X86::ZMM18, X86::ZMM19, X86::ZMM20, X86::ZMM21, X86::ZMM22, X86::ZMM23, X86::ZMM24, X86::ZMM25, X86::ZMM26, X86::ZMM27, X86::ZMM28, X86::ZMM29, X86::ZMM30, X86::ZMM31, X86::K4, X86::K5, X86::K6, X86::K7, 0 };
lib/Target/X86/AsmParser/X86Operand.h 354 return isMem256() && isMemIndexReg(X86::ZMM0, X86::ZMM31);
360 return isMem512() && isMemIndexReg(X86::ZMM0, X86::ZMM31);
lib/Target/X86/Disassembler/X86Disassembler.cpp 270 static constexpr MCPhysReg llvmRegnums[] = {ALL_REGS};
507 ALL_REGS
571 REGS_ZMM
lib/Target/X86/MCTargetDesc/X86BaseInfo.h 845 (RegNo >= X86::ZMM8 && RegNo <= X86::ZMM31))
872 (RegNo >= X86::ZMM16 && RegNo <= X86::ZMM31));
lib/Target/X86/MCTargetDesc/X86InstComments.cpp 203 if (X86::ZMM0 <= RegNo && RegNo <= X86::ZMM31)
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp 259 {codeview::RegisterId::AMD64_ZMM31, X86::ZMM31},
lib/Target/X86/X86EvexToVex.cpp 136 assert(!(Reg >= X86::ZMM0 && Reg <= X86::ZMM31) &&