|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/CodeGen/GlobalISel/Legalizer.cpp 210 Helper.MIRBuilder.stopObservingChanges();
lib/CodeGen/GlobalISel/LegalizerHelper.cpp 71 MIRBuilder.setMF(MF);
72 MIRBuilder.setChangeObserver(Observer);
79 MIRBuilder.setMF(MF);
80 MIRBuilder.setChangeObserver(Observer);
88 return LI.legalizeIntrinsic(MI, MRI, MIRBuilder) ? Legalized
115 return LI.legalizeCustom(MI, MRI, MIRBuilder, Observer) ? Legalized
127 MIRBuilder.buildUnmerge(VRegs, Reg);
145 MIRBuilder.buildUnmerge(VRegs, Reg);
162 MIRBuilder.buildExtract(NewReg, Reg, MainSize * I);
169 MIRBuilder.buildExtract(NewReg, Reg, Offset);
204 MIRBuilder.buildMerge(DstReg, PartRegs);
209 MIRBuilder.buildConcatVectors(DstReg, PartRegs);
211 MIRBuilder.buildBuildVector(DstReg, PartRegs);
219 MIRBuilder.buildUndef(CurResultReg);
224 MIRBuilder.buildInsert(NewResultReg, CurResultReg, PartReg, Offset);
234 MIRBuilder.buildInsert(NewResultReg, CurResultReg, LeftoverRegs[I], Offset);
493 auto &Ctx = MIRBuilder.getMF().getFunction().getContext();
495 MIRBuilder.setInstr(MI);
506 auto Status = simpleLibcall(MI, MIRBuilder, Size, HLTy);
532 auto Status = simpleLibcall(MI, MIRBuilder, Size, HLTy);
544 MI, MIRBuilder, Type::getDoubleTy(Ctx), Type::getFloatTy(Ctx));
556 MI, MIRBuilder, Type::getFloatTy(Ctx), Type::getDoubleTy(Ctx));
569 MI, MIRBuilder,
584 MI, MIRBuilder,
600 MIRBuilder.setInstr(MI);
618 MIRBuilder.buildUndef(NarrowTy)->getOperand(0).getReg());
622 MIRBuilder.buildBuildVector(DstReg, DstRegs);
624 MIRBuilder.buildMerge(DstReg, DstRegs);
638 auto K = MIRBuilder.buildConstant(NarrowTy,
648 auto K = MIRBuilder.buildConstant(
677 MIRBuilder.buildConstant(LLT::scalar(64), NarrowTy.getSizeInBits() - 1);
678 auto Shift = MIRBuilder.buildAShr(NarrowTy, SrcReg, ShiftAmt);
679 MIRBuilder.buildMerge(MI.getOperand(0).getReg(), {SrcReg, Shift.getReg(0)});
694 Register ZeroReg = MIRBuilder.buildConstant(SrcTy, 0).getReg(0);
699 MIRBuilder.buildMerge(MI.getOperand(0).getReg(), Srcs);
713 auto Unmerge = MIRBuilder.buildUnmerge(NarrowTy, MI.getOperand(1).getReg());
714 MIRBuilder.buildCopy(MI.getOperand(0).getReg(), Unmerge.getReg(0));
737 MIRBuilder.buildUAddo(DstReg, CarryOut, Src1Regs[i], Src2Regs[i]);
739 MIRBuilder.buildUAdde(DstReg, CarryOut, Src1Regs[i],
748 MIRBuilder.buildBuildVector(DstReg, DstRegs);
750 MIRBuilder.buildMerge(DstReg, DstRegs);
768 MIRBuilder.buildInstr(TargetOpcode::G_USUBO, {DstReg, BorrowOut},
776 MIRBuilder.buildInstr(TargetOpcode::G_USUBE, {DstReg, BorrowOut},
782 MIRBuilder.buildMerge(MI.getOperand(0).getReg(), DstRegs);
803 MIRBuilder.buildLoad(TmpReg, MI.getOperand(1).getReg(), MMO);
804 MIRBuilder.buildAnyExt(DstReg, TmpReg);
820 MIRBuilder.buildLoad(TmpReg, PtrReg, MMO);
824 MIRBuilder.buildInstr(ExtLoad)
831 MIRBuilder.buildZExt(DstReg, TmpReg);
833 MIRBuilder.buildSExt(DstReg, TmpReg);
855 MIRBuilder.buildTrunc(TmpReg, SrcReg);
856 MIRBuilder.buildStore(TmpReg, MI.getOperand(1).getReg(), MMO);
920 MIRBuilder.setInsertPt(OpMBB, OpMBB.getFirstTerminator());
925 MIRBuilder.setInsertPt(MBB, MI);
929 MIRBuilder.buildInstr(TargetOpcode::G_PHI).addDef(DstRegs[i]);
933 MIRBuilder.setInsertPt(MBB, MBB.getFirstNonPHI());
934 MIRBuilder.buildMerge(MI.getOperand(0).getReg(), DstRegs);
958 MIRBuilder.buildUnmerge({LHSL, LHSH}, MI.getOperand(2).getReg());
962 MIRBuilder.buildUnmerge({RHSL, RHSH}, MI.getOperand(3).getReg());
969 MachineInstrBuilder XorL = MIRBuilder.buildXor(NarrowTy, LHSL, RHSL);
970 MachineInstrBuilder XorH = MIRBuilder.buildXor(NarrowTy, LHSH, RHSH);
971 MachineInstrBuilder Or = MIRBuilder.buildOr(NarrowTy, XorL, XorH);
972 MachineInstrBuilder Zero = MIRBuilder.buildConstant(NarrowTy, 0);
973 MIRBuilder.buildICmp(Pred, MI.getOperand(0).getReg(), Or, Zero);
975 MachineInstrBuilder CmpH = MIRBuilder.buildICmp(Pred, ResTy, LHSH, RHSH);
977 MIRBuilder.buildICmp(CmpInst::Predicate::ICMP_EQ, ResTy, LHSH, RHSH);
978 MachineInstrBuilder CmpLU = MIRBuilder.buildICmp(
980 MIRBuilder.buildSelect(MI.getOperand(0).getReg(), CmpHEQ, CmpLU, CmpH);
1001 auto TruncMIB = MIRBuilder.buildTrunc(NarrowTy, MO1.getReg());
1006 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1006 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1006 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1007 MIRBuilder.buildInstr(TargetOpcode::G_SEXT, {MO2.getReg()}, {DstExt});
1034 MIRBuilder.buildUnmerge(SrcRegs, MI.getOperand(1).getReg());
1037 MIRBuilder.buildConstant(NarrowTy, NarrowTy.getScalarSizeInBits() - 1)
1054 DstRegs.push_back(MIRBuilder
1062 MIRBuilder
1074 MIRBuilder.buildMerge(DstReg, DstRegs);
1084 auto ExtB = MIRBuilder.buildInstr(ExtOpcode, {WideTy}, {MO.getReg()});
1091 auto ExtB = MIRBuilder.buildInstr(TargetOpcode::G_TRUNC, {NarrowTy},
1100 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1100 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1100 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1101 MIRBuilder.buildInstr(TruncOpcode, {MO.getReg()}, {DstExt});
1109 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1109 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1109 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1110 MIRBuilder.buildInstr(ExtOpcode, {MO.getReg()}, {DstTrunc});
1118 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1118 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1118 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1119 MIRBuilder.buildExtract(MO.getReg(), DstExt, 0);
1138 Register ImpDef = MIRBuilder.buildUndef(OldTy).getReg(0);
1142 auto Concat = MIRBuilder.buildConcatVectors(MoreTy, Parts);
1148 Register ImpDef = MIRBuilder.buildUndef(MoreTy).getReg(0);
1149 MIRBuilder.buildInsert(MoreReg, ImpDef, MO.getReg(), 0);
1177 Register ResultReg = MIRBuilder.buildZExt(WideTy, Src1).getReg(0);
1185 auto ZextInput = MIRBuilder.buildZExt(WideTy, SrcReg);
1190 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, Offset);
1191 auto Shl = MIRBuilder.buildShl(WideTy, ZextInput, ShiftAmt);
1192 MIRBuilder.buildOr(NextResult, ResultReg, Shl);
1197 MIRBuilder.buildTrunc(DstReg, ResultReg);
1199 MIRBuilder.buildIntToPtr(DstReg, ResultReg);
1240 auto Unmerge = MIRBuilder.buildUnmerge(GCDTy, SrcReg);
1248 Register UndefReg = MIRBuilder.buildUndef(GCDTy).getReg(0);
1258 auto Merge = MIRBuilder.buildMerge(WideTy, Slicer.take_front(PartsPerGCD));
1265 MIRBuilder.buildMerge(DstReg, NewMergeRegs);
1267 auto FinalMerge = MIRBuilder.buildMerge(WideDstTy, NewMergeRegs);
1268 MIRBuilder.buildTrunc(DstReg, FinalMerge.getReg(0));
1296 auto WideSrc = MIRBuilder.buildZExt(NewSrcTy, SrcReg);
1299 auto ShiftAmt = MIRBuilder.buildConstant(NewSrcTy, SizeDiff * I);
1300 auto Shl = MIRBuilder.buildShl(NewSrcTy, WideSrc, ShiftAmt);
1301 WideSrc = MIRBuilder.buildOr(NewSrcTy, WideSrc, Shl);
1333 const DataLayout &DL = MIRBuilder.getDataLayout();
1338 Src = MIRBuilder.buildPtrToInt(SrcAsIntTy, Src);
1347 MIRBuilder.buildTrunc(DstReg,
1348 MIRBuilder.buildAnyExtOrTrunc(WideTy, Src));
1356 Src = MIRBuilder.buildAnyExt(WideTy, Src);
1361 auto LShr = MIRBuilder.buildLShr(
1362 ShiftTy, Src, MIRBuilder.buildConstant(ShiftTy, Offset));
1363 MIRBuilder.buildTrunc(DstReg, LShr);
1408 MIRBuilder.setInstr(MI);
1425 auto LHSZext = MIRBuilder.buildInstr(TargetOpcode::G_ZEXT, {WideTy},
1427 auto RHSZext = MIRBuilder.buildInstr(TargetOpcode::G_ZEXT, {WideTy},
1433 auto NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSZext, RHSZext});
1436 auto AndOp = MIRBuilder.buildInstr(
1438 {NewOp, MIRBuilder.buildConstant(WideTy, Mask.getZExtValue())});
1440 MIRBuilder.buildICmp(CmpInst::ICMP_NE, MI.getOperand(1).getReg(), NewOp,
1443 MIRBuilder.buildTrunc(MI.getOperand(0).getReg(), NewOp);
1462 auto MIBSrc = MIRBuilder.buildZExt(WideTy, SrcReg);
1470 MIBSrc = MIRBuilder.buildOr(
1471 WideTy, MIBSrc, MIRBuilder.buildConstant(WideTy, TopBit));
1475 auto MIBNewOp = MIRBuilder.buildInstr(MI.getOpcode(), {WideTy}, {MIBSrc});
1481 MIBNewOp = MIRBuilder.buildInstr(
1483 {MIBNewOp, MIRBuilder.buildConstant(WideTy, SizeDiff)});
1486 MIRBuilder.buildZExtOrTrunc(MI.getOperand(0), MIBNewOp);
1501 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1501 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1501 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1505 MIRBuilder.buildConstant(ShiftAmtReg, DiffBits);
1506 MIRBuilder.buildInstr(TargetOpcode::G_LSHR)
1511 MIRBuilder.buildTrunc(DstReg, ShrReg);
1525 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1525 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1525 MIRBuilder.setInsertPt(MIRBuilder.getMBB(), ++MIRBuilder.getInsertPt());
1527 auto ShiftAmt = MIRBuilder.buildConstant(WideTy, DiffBits);
1528 auto Shift = MIRBuilder.buildLShr(WideTy, DstExt, ShiftAmt);
1529 MIRBuilder.buildTrunc(DstReg, Shift);
1618 widenScalarSrc(MI, WideTy, 1, MIRBuilder.getBoolExtOp(IsVec, false));
1677 LLVMContext &Ctx = MIRBuilder.getMF().getFunction().getContext();
1688 LLVMContext &Ctx = MIRBuilder.getMF().getFunction().getContext();
1721 widenScalarSrc(MI, WideTy, 0, MIRBuilder.getBoolExtOp(false, false));
1764 MIRBuilder.setInsertPt(OpMBB, OpMBB.getFirstTerminator());
1769 MIRBuilder.setInsertPt(MBB, --MBB.getFirstNonPHI());
1911 MIRBuilder.setInstr(MI);
1919 MIRBuilder.buildInstr(MI.getOpcode() == G_SREM ? G_SDIV : G_UDIV)
1925 MIRBuilder.buildMul(ProdReg, QuotReg, MI.getOperand(2).getReg());
1926 MIRBuilder.buildSub(MI.getOperand(0).getReg(), MI.getOperand(1).getReg(),
1943 MIRBuilder.buildMul(Res, LHS, RHS);
1950 MIRBuilder.buildInstr(Opcode)
1956 MIRBuilder.buildConstant(Zero, 0);
1963 MIRBuilder.buildConstant(ShiftAmt, Ty.getSizeInBits() - 1);
1964 MIRBuilder.buildInstr(TargetOpcode::G_ASHR)
1968 MIRBuilder.buildICmp(CmpInst::ICMP_NE, Overflow, HiPart, Shifted);
1970 MIRBuilder.buildICmp(CmpInst::ICMP_NE, Overflow, HiPart, Zero);
1982 LLVMContext &Ctx = MIRBuilder.getMF().getFunction().getContext();
2001 auto Zero = MIRBuilder.buildFConstant(Ty, ZeroForNegation);
2004 MIRBuilder.buildInstr(TargetOpcode::G_FSUB, {Res}, {ZeroReg, SubByReg},
2019 MIRBuilder.buildInstr(TargetOpcode::G_FNEG).addDef(Neg).addUse(RHS);
2020 MIRBuilder.buildInstr(TargetOpcode::G_FADD, {Res}, {LHS, Neg}, MI.getFlags());
2032 MIRBuilder.buildAtomicCmpXchg(OldValRes, Addr, CmpVal, NewVal,
2034 MIRBuilder.buildICmp(CmpInst::ICMP_EQ, SuccessRes, OldValRes, CmpVal);
2070 MachineFunction &MF = MIRBuilder.getMF();
2082 MIRBuilder.buildLoad(LargeLdReg, PtrReg, *LargeMMO);
2085 MIRBuilder.buildConstant(LLT::scalar(64), LargeSplitSize / 8);
2087 auto SmallPtr = MIRBuilder.buildGEP(GEPReg, PtrReg, OffsetCst.getReg(0));
2088 auto SmallLoad = MIRBuilder.buildLoad(SmallLdReg, SmallPtr.getReg(0),
2091 auto ShiftAmt = MIRBuilder.buildConstant(AnyExtTy, LargeSplitSize);
2092 auto Shift = MIRBuilder.buildShl(AnyExtTy, SmallLoad, ShiftAmt);
2093 auto Or = MIRBuilder.buildOr(AnyExtTy, Shift, LargeLoad);
2094 MIRBuilder.buildTrunc(DstReg, {Or.getReg(0)});
2098 MIRBuilder.buildLoad(DstReg, PtrReg, MMO);
2106 MIRBuilder.buildLoad(TmpReg, PtrReg, MMO);
2111 MIRBuilder.buildAnyExt(DstReg, TmpReg);
2114 MIRBuilder.buildSExt(DstReg, TmpReg);
2117 MIRBuilder.buildZExt(DstReg, TmpReg);
2146 auto ExtVal = MIRBuilder.buildAnyExt(ExtendTy, SrcReg);
2151 auto ShiftAmt = MIRBuilder.buildConstant(ExtendTy, LargeSplitSize);
2152 auto SmallVal = MIRBuilder.buildLShr(ExtendTy, ExtVal, ShiftAmt);
2157 MIRBuilder.buildConstant(LLT::scalar(64), LargeSplitSize / 8);
2159 auto SmallPtr = MIRBuilder.buildGEP(GEPReg, PtrReg, OffsetCst.getReg(0));
2161 MachineFunction &MF = MIRBuilder.getMF();
2166 MIRBuilder.buildStore(ExtVal.getReg(0), PtrReg, *LargeMMO);
2167 MIRBuilder.buildStore(SmallVal.getReg(0), SmallPtr.getReg(0), *SmallMMO);
2183 MIRBuilder.buildAdd(Res, LHS, RHS);
2184 MIRBuilder.buildICmp(CmpInst::ICMP_ULT, CarryOut, Res, RHS);
2199 MIRBuilder.buildAdd(TmpRes, LHS, RHS);
2200 MIRBuilder.buildZExt(ZExtCarryIn, CarryIn);
2201 MIRBuilder.buildAdd(Res, TmpRes, ZExtCarryIn);
2202 MIRBuilder.buildICmp(CmpInst::ICMP_ULT, CarryOut, Res, LHS);
2213 MIRBuilder.buildSub(Res, LHS, RHS);
2214 MIRBuilder.buildICmp(CmpInst::ICMP_ULT, BorrowOut, LHS, RHS);
2231 MIRBuilder.buildSub(TmpRes, LHS, RHS);
2232 MIRBuilder.buildZExt(ZExtBorrowIn, BorrowIn);
2233 MIRBuilder.buildSub(Res, TmpRes, ZExtBorrowIn);
2234 MIRBuilder.buildICmp(CmpInst::ICMP_EQ, LHS_EQ_RHS, LHS, RHS);
2235 MIRBuilder.buildICmp(CmpInst::ICMP_ULT, LHS_ULT_RHS, LHS, RHS);
2236 MIRBuilder.buildSelect(BorrowOut, LHS_EQ_RHS, BorrowIn, LHS_ULT_RHS);
2268 auto MIBSz = MIRBuilder.buildConstant(DstTy, DstTy.getScalarSizeInBits() - SizeInBits);
2269 MIRBuilder.buildInstr(TargetOpcode::G_SHL, {TmpRes}, {SrcReg, MIBSz->getOperand(0).getReg()});
2270 MIRBuilder.buildInstr(TargetOpcode::G_ASHR, {DstReg}, {TmpRes, MIBSz->getOperand(0).getReg()});
2300 MIRBuilder.buildUndef(TmpReg);
2305 MIRBuilder.buildConcatVectors(DstReg, DstRegs);
2307 MIRBuilder.buildBuildVector(DstReg, DstRegs);
2335 MIRBuilder.buildUndef(AccumDstReg);
2343 MIRBuilder.buildExtract(PartOpReg, MI.getOperand(I).getReg(), Offset);
2348 MIRBuilder.buildInstr(Opc, {PartDstReg}, SrcOps, Flags);
2351 MIRBuilder.buildInsert(PartInsertReg, AccumDstReg, PartDstReg, Offset);
2359 MIRBuilder.buildExtract(PartOpReg, MI.getOperand(I).getReg(),
2365 MIRBuilder.buildInstr(Opc, {PartDstReg}, SrcOps, Flags);
2366 MIRBuilder.buildInsert(DstReg, AccumDstReg, PartDstReg, BitsForNumParts);
2386 MIRBuilder.buildInstr(Opc, {DstReg}, {Src0Regs[i]}, Flags);
2388 MIRBuilder.buildInstr(Opc, {DstReg}, {Src0Regs[i], Src1Regs[i]}, Flags);
2390 MIRBuilder.buildInstr(Opc, {DstReg},
2398 MIRBuilder.buildConcatVectors(DstReg, DstRegs);
2400 MIRBuilder.buildBuildVector(DstReg, DstRegs);
2462 NewInsts.push_back(MIRBuilder.buildInstrNoInsert(MI.getOpcode())
2470 NewInsts.push_back(MIRBuilder.buildInstrNoInsert(MI.getOpcode())
2494 MIRBuilder.insertInstr(MIB);
2534 MachineInstr *NewInst = MIRBuilder.buildInstr(MI.getOpcode())
2543 MIRBuilder.buildConcatVectors(DstReg, DstRegs);
2545 MIRBuilder.buildBuildVector(DstReg, DstRegs);
2601 MIRBuilder.buildICmp(Pred, DstReg, Src1Regs[I], Src2Regs[I]);
2604 = MIRBuilder.buildFCmp(Pred, DstReg, Src1Regs[I], Src2Regs[I]);
2610 MIRBuilder.buildConcatVectors(DstReg, DstRegs);
2612 MIRBuilder.buildBuildVector(DstReg, DstRegs);
2676 MIRBuilder.buildSelect(DstReg, CondTy.isVector() ? Src0Regs[i] : CondReg,
2682 MIRBuilder.buildConcatVectors(DstReg, DstRegs);
2684 MIRBuilder.buildBuildVector(DstReg, DstRegs);
2715 NewInsts.push_back(MIRBuilder.buildInstr(TargetOpcode::G_PHI)
2724 MIRBuilder.setInsertPt(*MBB, MBB->getFirstNonPHI());
2736 MIRBuilder.setInsertPt(OpMBB, OpMBB.getFirstTerminator());
2781 auto Unmerge = MIRBuilder.buildUnmerge(GCDTy, SrcReg);
2786 auto MIB = MIRBuilder.buildInstr(TargetOpcode::G_UNMERGE_VALUES);
2816 UndefReg = MIRBuilder.buildUndef(SrcTy).getReg(0);
2840 auto BuildVec = MIRBuilder.buildBuildVector(NarrowTy, SubBuildVector);
2846 MIRBuilder.buildConcatVectors(DstReg, ConcatOps);
2848 auto Concat = MIRBuilder.buildConcatVectors(WidenedDstTy, ConcatOps);
2849 MIRBuilder.buildExtract(DstReg, Concat, 0);
2903 MachineFunction &MF = MIRBuilder.getMF();
2911 MIRBuilder.materializeGEP(NewAddrReg, AddrReg, OffsetTy, ByteOffset);
2919 MIRBuilder.buildLoad(Dst, NewAddrReg, *NewMMO);
2921 MIRBuilder.buildStore(ValRegs[Idx], NewAddrReg, *NewMMO);
2948 MIRBuilder.setInstr(MI);
3047 MIRBuilder.buildUnmerge({InL, InH}, MI.getOperand(1).getReg());
3050 MIRBuilder.buildMerge(MI.getOperand(0).getReg(), {InL, InH});
3062 Lo = Hi = MIRBuilder.buildConstant(NVT, 0);
3064 Lo = MIRBuilder.buildConstant(NVT, 0);
3065 Hi = MIRBuilder.buildShl(NVT, InL,
3066 MIRBuilder.buildConstant(AmtTy, Amt - NVTBits));
3068 Lo = MIRBuilder.buildConstant(NVT, 0);
3071 Lo = MIRBuilder.buildShl(NVT, InL, MIRBuilder.buildConstant(AmtTy, Amt));
3071 Lo = MIRBuilder.buildShl(NVT, InL, MIRBuilder.buildConstant(AmtTy, Amt));
3073 MIRBuilder.buildShl(NVT, InH, MIRBuilder.buildConstant(AmtTy, Amt));
3073 MIRBuilder.buildShl(NVT, InH, MIRBuilder.buildConstant(AmtTy, Amt));
3074 auto OrRHS = MIRBuilder.buildLShr(
3075 NVT, InL, MIRBuilder.buildConstant(AmtTy, -Amt + NVTBits));
3076 Hi = MIRBuilder.buildOr(NVT, OrLHS, OrRHS);
3080 Lo = Hi = MIRBuilder.buildConstant(NVT, 0);
3082 Lo = MIRBuilder.buildLShr(NVT, InH,
3083 MIRBuilder.buildConstant(AmtTy, Amt - NVTBits));
3084 Hi = MIRBuilder.buildConstant(NVT, 0);
3087 Hi = MIRBuilder.buildConstant(NVT, 0);
3089 auto ShiftAmtConst = MIRBuilder.buildConstant(AmtTy, Amt);
3091 auto OrLHS = MIRBuilder.buildLShr(NVT, InL, ShiftAmtConst);
3092 auto OrRHS = MIRBuilder.buildShl(
3093 NVT, InH, MIRBuilder.buildConstant(AmtTy, -Amt + NVTBits));
3095 Lo = MIRBuilder.buildOr(NVT, OrLHS, OrRHS);
3096 Hi = MIRBuilder.buildLShr(NVT, InH, ShiftAmtConst);
3100 Hi = Lo = MIRBuilder.buildAShr(
3101 NVT, InH, MIRBuilder.buildConstant(AmtTy, NVTBits - 1));
3103 Lo = MIRBuilder.buildAShr(NVT, InH,
3104 MIRBuilder.buildConstant(AmtTy, Amt - NVTBits));
3105 Hi = MIRBuilder.buildAShr(NVT, InH,
3106 MIRBuilder.buildConstant(AmtTy, NVTBits - 1));
3109 Hi = MIRBuilder.buildAShr(NVT, InH,
3110 MIRBuilder.buildConstant(AmtTy, NVTBits - 1));
3112 auto ShiftAmtConst = MIRBuilder.buildConstant(AmtTy, Amt);
3114 auto OrLHS = MIRBuilder.buildLShr(NVT, InL, ShiftAmtConst);
3115 auto OrRHS = MIRBuilder.buildShl(
3116 NVT, InH, MIRBuilder.buildConstant(AmtTy, -Amt + NVTBits));
3118 Lo = MIRBuilder.buildOr(NVT, OrLHS, OrRHS);
3119 Hi = MIRBuilder.buildAShr(NVT, InH, ShiftAmtConst);
3123 MIRBuilder.buildMerge(MI.getOperand(0).getReg(), {Lo.getReg(), Hi.getReg()});
3167 auto NewBits = MIRBuilder.buildConstant(ShiftAmtTy, NewBitSize);
3171 MIRBuilder.buildUnmerge({InL, InH}, MI.getOperand(1).getReg());
3173 auto AmtExcess = MIRBuilder.buildSub(ShiftAmtTy, Amt, NewBits);
3174 auto AmtLack = MIRBuilder.buildSub(ShiftAmtTy, NewBits, Amt);
3176 auto Zero = MIRBuilder.buildConstant(ShiftAmtTy, 0);
3177 auto IsShort = MIRBuilder.buildICmp(ICmpInst::ICMP_ULT, CondTy, Amt, NewBits);
3178 auto IsZero = MIRBuilder.buildICmp(ICmpInst::ICMP_EQ, CondTy, Amt, Zero);
3184 auto LoS = MIRBuilder.buildShl(HalfTy, InL, Amt);
3186 auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, AmtLack);
3187 auto HiOr = MIRBuilder.buildShl(HalfTy, InH, Amt);
3188 auto HiS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr);
3191 auto LoL = MIRBuilder.buildConstant(HalfTy, 0); // Lo part is zero.
3192 auto HiL = MIRBuilder.buildShl(HalfTy, InL, AmtExcess); // Hi from Lo part.
3194 auto Lo = MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL);
3195 auto Hi = MIRBuilder.buildSelect(
3196 HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL));
3205 auto HiS = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy}, {InH, Amt});
3207 auto LoOr = MIRBuilder.buildLShr(HalfTy, InL, Amt);
3208 auto HiOr = MIRBuilder.buildShl(HalfTy, InH, AmtLack);
3209 auto LoS = MIRBuilder.buildOr(HalfTy, LoOr, HiOr);
3214 HiL = MIRBuilder.buildConstant(HalfTy, 0); // Hi part is zero.
3216 auto ShiftAmt = MIRBuilder.buildConstant(ShiftAmtTy, NewBitSize - 1);
3217 HiL = MIRBuilder.buildAShr(HalfTy, InH, ShiftAmt); // Sign of Hi part.
3219 auto LoL = MIRBuilder.buildInstr(MI.getOpcode(), {HalfTy},
3222 auto Lo = MIRBuilder.buildSelect(
3223 HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL));
3225 auto Hi = MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL);
3235 MIRBuilder.buildMerge(DstReg, ResultRegs);
3248 MIRBuilder.setInsertPt(OpMBB, OpMBB.getFirstTerminator());
3253 MIRBuilder.setInsertPt(MBB, --MBB.getFirstNonPHI());
3262 MIRBuilder.setInstr(MI);
3330 auto MIB = MIRBuilder.buildInstr(TargetOpcode::G_UNMERGE_VALUES);
3353 MachineIRBuilder &B = MIRBuilder;
3442 MIRBuilder.buildMerge(DstReg, DstRegs);
3497 MIRBuilder.buildExtract(SegReg, SrcRegs[i], ExtractOffset);
3505 MIRBuilder.buildBuildVector(DstReg, DstRegs);
3507 MIRBuilder.buildMerge(DstReg, DstRegs);
3569 MIRBuilder.buildExtract(SegReg, OpReg, ExtractOffset);
3573 MIRBuilder.buildInsert(DstReg, SrcRegs[i], SegReg, InsertOffset);
3580 MIRBuilder.buildBuildVector(DstReg, DstRegs);
3582 MIRBuilder.buildMerge(DstReg, DstRegs);
3609 auto Inst = MIRBuilder.buildInstr(MI.getOpcode(), {NarrowTy},
3615 auto Inst = MIRBuilder.buildInstr(
3656 auto Select = MIRBuilder.buildSelect(NarrowTy,
3662 auto Select = MIRBuilder.buildSelect(
3697 auto MIBCtlzZU = MIRBuilder.buildInstr(TargetOpcode::G_CTLZ_ZERO_UNDEF,
3699 auto MIBZero = MIRBuilder.buildConstant(Ty, 0);
3700 auto MIBLen = MIRBuilder.buildConstant(Ty, Len);
3701 auto MIBICmp = MIRBuilder.buildICmp(CmpInst::ICMP_EQ, LLT::scalar(1),
3703 MIRBuilder.buildSelect(MI.getOperand(0).getReg(), MIBICmp, MIBLen,
3722 auto MIBShiftAmt = MIRBuilder.buildConstant(Ty, 1ULL << i);
3723 auto MIBOp = MIRBuilder.buildInstr(
3725 {Op, MIRBuilder.buildInstr(TargetOpcode::G_LSHR, {Ty},
3729 auto MIBPop = MIRBuilder.buildInstr(TargetOpcode::G_CTPOP, {Ty}, {Op});
3730 MIRBuilder.buildInstr(TargetOpcode::G_SUB, {MI.getOperand(0).getReg()},
3731 {MIRBuilder.buildConstant(Ty, Len), MIBPop});
3748 auto MIBCttzZU = MIRBuilder.buildInstr(TargetOpcode::G_CTTZ_ZERO_UNDEF,
3750 auto MIBZero = MIRBuilder.buildConstant(Ty, 0);
3751 auto MIBLen = MIRBuilder.buildConstant(Ty, Len);
3752 auto MIBICmp = MIRBuilder.buildICmp(CmpInst::ICMP_EQ, LLT::scalar(1),
3754 MIRBuilder.buildSelect(MI.getOperand(0).getReg(), MIBICmp, MIBLen,
3763 auto MIBCstNeg1 = MIRBuilder.buildConstant(Ty, -1);
3765 MIRBuilder.buildInstr(TargetOpcode::G_XOR, {Ty}, {SrcReg, MIBCstNeg1});
3766 auto MIBTmp = MIRBuilder.buildInstr(
3768 {MIBNot, MIRBuilder.buildInstr(TargetOpcode::G_ADD, {Ty},
3772 auto MIBCstLen = MIRBuilder.buildConstant(Ty, Len);
3773 MIRBuilder.buildInstr(
3776 MIRBuilder.buildInstr(TargetOpcode::G_CTLZ, {Ty}, {MIBTmp})});
3809 auto Zero32 = MIRBuilder.buildConstant(S32, 0);
3810 auto Zero64 = MIRBuilder.buildConstant(S64, 0);
3812 auto LZ = MIRBuilder.buildCTLZ_ZERO_UNDEF(S32, Src);
3814 auto K = MIRBuilder.buildConstant(S32, 127U + 63U);
3815 auto Sub = MIRBuilder.buildSub(S32, K, LZ);
3817 auto NotZero = MIRBuilder.buildICmp(CmpInst::ICMP_NE, S1, Src, Zero64);
3818 auto E = MIRBuilder.buildSelect(S32, NotZero, Sub, Zero32);
3820 auto Mask0 = MIRBuilder.buildConstant(S64, (-1ULL) >> 1);
3821 auto ShlLZ = MIRBuilder.buildShl(S64, Src, LZ);
3823 auto U = MIRBuilder.buildAnd(S64, ShlLZ, Mask0);
3825 auto Mask1 = MIRBuilder.buildConstant(S64, 0xffffffffffULL);
3826 auto T = MIRBuilder.buildAnd(S64, U, Mask1);
3828 auto UShl = MIRBuilder.buildLShr(S64, U, MIRBuilder.buildConstant(S64, 40));
3828 auto UShl = MIRBuilder.buildLShr(S64, U, MIRBuilder.buildConstant(S64, 40));
3829 auto ShlE = MIRBuilder.buildShl(S32, E, MIRBuilder.buildConstant(S32, 23));
3829 auto ShlE = MIRBuilder.buildShl(S32, E, MIRBuilder.buildConstant(S32, 23));
3830 auto V = MIRBuilder.buildOr(S32, ShlE, MIRBuilder.buildTrunc(S32, UShl));
3830 auto V = MIRBuilder.buildOr(S32, ShlE, MIRBuilder.buildTrunc(S32, UShl));
3832 auto C = MIRBuilder.buildConstant(S64, 0x8000000000ULL);
3833 auto RCmp = MIRBuilder.buildICmp(CmpInst::ICMP_UGT, S1, T, C);
3834 auto TCmp = MIRBuilder.buildICmp(CmpInst::ICMP_EQ, S1, T, C);
3835 auto One = MIRBuilder.buildConstant(S32, 1);
3837 auto VTrunc1 = MIRBuilder.buildAnd(S32, V, One);
3838 auto Select0 = MIRBuilder.buildSelect(S32, TCmp, VTrunc1, Zero32);
3839 auto R = MIRBuilder.buildSelect(S32, RCmp, One, Select0);
3840 MIRBuilder.buildAdd(Dst, V, R);
3887 auto SignBit = MIRBuilder.buildConstant(S64, 63);
3888 auto S = MIRBuilder.buildAShr(S64, L, SignBit);
3890 auto LPlusS = MIRBuilder.buildAdd(S64, L, S);
3891 auto Xor = MIRBuilder.buildXor(S64, LPlusS, S);
3892 auto R = MIRBuilder.buildUITOFP(S32, Xor);
3894 auto RNeg = MIRBuilder.buildFNeg(S32, R);
3895 auto SignNotZero = MIRBuilder.buildICmp(CmpInst::ICMP_NE, S1, S,
3896 MIRBuilder.buildConstant(S64, 0));
3897 MIRBuilder.buildSelect(Dst, SignNotZero, RNeg, R);
3928 MachineInstrBuilder FPTOSI = MIRBuilder.buildFPTOSI(DstTy, Src);
3930 MachineInstrBuilder Threshold = MIRBuilder.buildFConstant(SrcTy, TwoPExpFP);
3933 MachineInstrBuilder FSub = MIRBuilder.buildFSub(SrcTy, Src, Threshold);
3934 MachineInstrBuilder ResLowBits = MIRBuilder.buildFPTOSI(DstTy, FSub);
3935 MachineInstrBuilder ResHighBit = MIRBuilder.buildConstant(DstTy, TwoPExpInt);
3936 MachineInstrBuilder Res = MIRBuilder.buildXor(DstTy, ResLowBits, ResHighBit);
3939 MIRBuilder.buildFCmp(CmpInst::FCMP_ULT, DstTy, Src, Threshold);
3940 MIRBuilder.buildSelect(Dst, FCMP, FPTOSI, Res);
3970 auto Cmp = MIRBuilder.buildICmp(Pred, CmpType, Src0, Src1);
3971 MIRBuilder.buildSelect(Dst, Cmp, Src0, Src1);
3989 auto SignBitMask = MIRBuilder.buildConstant(
3992 auto NotSignBitMask = MIRBuilder.buildConstant(
3995 auto And0 = MIRBuilder.buildAnd(Src0Ty, Src0, NotSignBitMask);
3999 auto And1 = MIRBuilder.buildAnd(Src1Ty, Src0, SignBitMask);
4000 Or = MIRBuilder.buildOr(Dst, And0, And1);
4002 auto ShiftAmt = MIRBuilder.buildConstant(Src0Ty, Src0Size - Src1Size);
4003 auto Zext = MIRBuilder.buildZExt(Src0Ty, Src1);
4004 auto Shift = MIRBuilder.buildShl(Src0Ty, Zext, ShiftAmt);
4005 auto And1 = MIRBuilder.buildAnd(Src0Ty, Shift, SignBitMask);
4006 Or = MIRBuilder.buildOr(Dst, And0, And1);
4008 auto ShiftAmt = MIRBuilder.buildConstant(Src1Ty, Src1Size - Src0Size);
4009 auto Shift = MIRBuilder.buildLShr(Src1Ty, Src1, ShiftAmt);
4010 auto Trunc = MIRBuilder.buildTrunc(Src0Ty, Shift);
4011 auto And1 = MIRBuilder.buildAnd(Src0Ty, Trunc, SignBitMask);
4012 Or = MIRBuilder.buildOr(Dst, And0, And1);
4043 Src0 = MIRBuilder.buildFCanonicalize(Ty, Src0, MI.getFlags()).getReg(0);
4046 Src1 = MIRBuilder.buildFCanonicalize(Ty, Src1, MI.getFlags()).getReg(0);
4051 MIRBuilder.buildInstr(NewOp, {Dst}, {Src0, Src1}, MI.getFlags());
4062 auto Mul = MIRBuilder.buildFMul(Ty, MI.getOperand(1), MI.getOperand(2),
4064 MIRBuilder.buildFAdd(DstReg, Mul, MI.getOperand(3), Flags);
4083 Register Cast = MIRBuilder.buildBitcast(IntTy, SrcReg).getReg(0);
4085 MIRBuilder.buildTrunc(Dst0Reg, Cast);
4090 auto ShiftAmt = MIRBuilder.buildConstant(IntTy, Offset);
4091 auto Shift = MIRBuilder.buildLShr(IntTy, Cast, ShiftAmt);
4092 MIRBuilder.buildTrunc(MI.getOperand(I), Shift);
4124 Val = MIRBuilder.buildUndef(DstTy).getReg(0);
4127 MIRBuilder.buildCopy(DstReg, Val);
4139 Undef = MIRBuilder.buildUndef(EltTy).getReg(0);
4150 auto IdxK = MIRBuilder.buildConstant(IdxTy, ExtractIdx);
4151 auto Extract = MIRBuilder.buildExtractVectorElement(EltTy, SrcVec, IdxK);
4156 MIRBuilder.buildBuildVector(DstReg, BuildVec);
4174 auto SPTmp = MIRBuilder.buildCopy(PtrTy, SPReg);
4175 SPTmp = MIRBuilder.buildCast(IntPtrTy, SPTmp);
4180 auto Alloc = MIRBuilder.buildSub(IntPtrTy, SPTmp, AllocSize);
4184 auto AlignCst = MIRBuilder.buildConstant(IntPtrTy, AlignMask);
4185 Alloc = MIRBuilder.buildAnd(IntPtrTy, Alloc, AlignCst);
4188 SPTmp = MIRBuilder.buildCast(PtrTy, Alloc);
4189 MIRBuilder.buildCopy(SPReg, SPTmp);
4190 MIRBuilder.buildCopy(Dst, SPTmp);
4211 Src = MIRBuilder.buildBitcast(SrcIntTy, Src).getReg(0);
4215 MIRBuilder.buildTrunc(Dst, Src);
4217 auto ShiftAmt = MIRBuilder.buildConstant(SrcIntTy, Offset);
4218 auto Shr = MIRBuilder.buildLShr(SrcIntTy, Src, ShiftAmt);
4219 MIRBuilder.buildTrunc(Dst, Shr);
4244 Src = MIRBuilder.buildBitcast(IntDstTy, Src).getReg(0);
4247 Register ExtInsSrc = MIRBuilder.buildZExt(IntDstTy, InsertSrc).getReg(0);
4249 auto ShiftAmt = MIRBuilder.buildConstant(IntDstTy, Offset);
4250 ExtInsSrc = MIRBuilder.buildShl(IntDstTy, ExtInsSrc, ShiftAmt).getReg(0);
4256 auto Mask = MIRBuilder.buildConstant(IntDstTy, MaskVal);
4257 auto MaskedSrc = MIRBuilder.buildAnd(IntDstTy, Src, Mask);
4258 auto Or = MIRBuilder.buildOr(IntDstTy, MaskedSrc, ExtInsSrc);
4260 MIRBuilder.buildBitcast(Dst, Or);
4280 MIRBuilder.buildAdd(Dst0, LHS, RHS);
4282 MIRBuilder.buildSub(Dst0, LHS, RHS);
4286 auto Zero = MIRBuilder.buildConstant(Ty, 0);
4295 MIRBuilder.buildICmp(CmpInst::ICMP_SLT, BoolTy, Dst0, LHS);
4296 auto ConditionRHS = MIRBuilder.buildICmp(
4299 MIRBuilder.buildXor(Dst1, ConditionRHS, ResultLowerThanLHS);