reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/MachineInstrBuilder.h

  498   return getDefRegState(RegOp.isDef()) | getImplRegState(RegOp.isImplicit()) |

lib/CodeGen/MachineInstrBundle.cpp

  215       MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) |

lib/CodeGen/SelectionDAG/InstrEmitter.cpp

  355   MIB.addReg(VReg, getDefRegState(isOptDef) | getKillRegState(isKill) |

lib/Target/AArch64/AArch64FrameLowering.cpp

 2137       MIB.addReg(Reg2, getDefRegState(true));
 2142     MIB.addReg(Reg1, getDefRegState(true))

lib/Target/AArch64/AArch64InstrInfo.cpp

 3034                                      .addReg(DestReg, getDefRegState(true))

lib/Target/AMDGPU/SIRegisterInfo.cpp

  692     unsigned SrcDstRegState = getDefRegState(!IsStore);
  716         .addReg(SubReg, getDefRegState(!IsStore) | getKillRegState(IsKill))

lib/Target/ARM/ARMBaseRegisterInfo.cpp

  470       .addReg(DestReg, getDefRegState(true), SubIdx)

lib/Target/ARM/ARMFrameLowering.cpp

 1124         MIB.addReg(Regs[i], getDefRegState(true));

lib/Target/ARM/ARMLoadStoreOptimizer.cpp

  802     MIB.addReg(Base, getDefRegState(true))
  818     MIB.addReg(R.first, getDefRegState(isDef) | getKillRegState(R.second));
 1318     .addReg(Base, getDefRegState(true)) // WB base register
 1442       .addReg(Base, getDefRegState(true)) // WB base register
 1445       .addReg(MO.getReg(), (isLd ? getDefRegState(true) :
 1630       .addReg(Reg, getDefRegState(true) | getDeadRegState(RegDeadKill))
 1701         .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill))
 1702         .addReg(OddReg,  getDefRegState(isLd) | getDeadRegState(OddDeadKill))

lib/Target/ARM/MLxExpansionPass.cpp

  298     .addReg(DstReg, getDefRegState(true) | getDeadRegState(DstDead));

lib/Target/ARM/Thumb1FrameLowering.cpp

 1059     MIB.addReg(Reg, getDefRegState(true));

lib/Target/ARM/Thumb1InstrInfo.cpp

   73         .addReg(DestReg, getDefRegState(true));

lib/Target/ARM/ThumbRegisterInfo.cpp

   76     .addReg(DestReg, getDefRegState(true), SubIdx)
   95       .addReg(DestReg, getDefRegState(true), SubIdx)

lib/Target/Lanai/LanaiMemAluCombiner.cpp

  260   InstrBuilder.addReg(Dest.getReg(), getDefRegState(true));

lib/Target/MSP430/MSP430InstrInfo.cpp

   80       .addReg(DestReg, getDefRegState(true)).addFrameIndex(FrameIdx)
   84       .addReg(DestReg, getDefRegState(true)).addFrameIndex(FrameIdx)

lib/Target/X86/X86FrameLowering.cpp

  332             .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub))

lib/Target/X86/X86InstrInfo.cpp

 5540                getDefRegState(ImpOp.isDef()) |