reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/MachinePipeliner.cpp

  369                     .addReg(RegOp.getReg(), getRegState(RegOp),

lib/CodeGen/UnreachableBlockElim.cpp

  197                 .addReg(InputReg, getRegState(Input), InputSub);

lib/Target/Hexagon/HexagonConstPropagation.cpp

 2985                     .addReg(R1.Reg, getRegState(Acc), R1.SubReg);
 3015                 .addReg(Src1.getReg(), getRegState(Src1), Src1.getSubReg())
 3016                 .addReg(OpR2.getReg(), getRegState(OpR2), OpR2.getSubReg())
 3051                   .addReg(SR.Reg, getRegState(SO), SR.SubReg);
 3083                   .addReg(SR.Reg, getRegState(SO), SR.SubReg);

lib/Target/Hexagon/HexagonExpandCondsets.cpp

  638   unsigned PredState = getRegState(PredOp) & ~RegState::Kill;
  642     unsigned SrcState = getRegState(SrcOp);
  695       unsigned S = getRegState(ST);
  884   MB.addReg(DefOp.getReg(), getRegState(DefOp), DefOp.getSubReg());

lib/Target/Hexagon/HexagonInstrInfo.cpp

 1261       unsigned PState = getRegState(Op1);
 1295       unsigned PState = getRegState(Op1);

lib/Target/Hexagon/HexagonSplitDouble.cpp

  642   unsigned RSA = getRegState(AdrOp);
  745       .addReg(Op1.getReg(), getRegState(Op1), Op1.getSubReg());
  753       .addReg(Op2.getReg(), getRegState(Op2), Op2.getSubReg());
  768   unsigned RS = getRegState(Op1);
  802   unsigned RS = getRegState(Op1);
  922   unsigned RS1 = getRegState(Op1);
  923   unsigned RS2 = getRegState(Op2);

lib/Target/SystemZ/SystemZPostRewrite.cpp

  124         .addReg(MBBI->getOperand(1).getReg(), getRegState(MBBI->getOperand(1)));
  131         .addReg(MBBI->getOperand(2).getReg(), getRegState(MBBI->getOperand(2)));
  201       .addReg(MI.getOperand(2).getReg(), getRegState(MI.getOperand(2)));

lib/Target/X86/X86InstrInfo.cpp

 4176     unsigned MaskState = getRegState(MIB->getOperand(1));