reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

include/llvm/CodeGen/MachinePipeliner.h

  202         RegClassInfo(rci), II_setByPragma(II), Topo(SUnits, &ExitSU) {

lib/CodeGen/MachineScheduler.cpp

  640   if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU)
  841   ExitSU.biasCriticalPath();
  865   releasePredecessors(&ExitSU);
 1113         if (SU.isScheduled || &SU == &ExitSU)
 1147         if (!SU->isScheduled && SU != &ExitSU) {
 1181   if (ExitSU.getInstr() != nullptr)
 1182     dumpNodeAll(ExitSU);
 1342       if (SU == &ExitSU)
 2842   Rem.CriticalPath = DAG->ExitSU.getDepth();
 3344   Rem.CriticalPath = DAG->ExitSU.getDepth();

lib/CodeGen/MacroFusion.cpp

   76   if (&SecondSU != &DAG.ExitSU)
   80           SU == &DAG.ExitSU || SU == &SecondSU || SU->isPred(&SecondSU))
  101     if (&SecondSU == &DAG.ExitSU) {
  138   if (DAG->ExitSU.getInstr())
  140     scheduleAdjacentImpl(*DAG, DAG->ExitSU);

lib/CodeGen/PostRASchedulerList.cpp

  483   if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU)

lib/CodeGen/ScheduleDAG.cpp

   67   ExitSU = SUnit();
  357   else if (&SU == &ExitSU)

lib/CodeGen/ScheduleDAGInstrs.cpp

  116                              Type::getVoidTy(mf.getFunction().getContext()))), Topo(SUnits, &ExitSU) {
  202   ExitSU.setInstr(ExitMI);
  209         Uses.insert(PhysRegSUOper(&ExitSU, -1, Reg));
  211         addVRegUseDeps(&ExitSU, ExitMI->getOperandNo(&MO));
  221           Uses.insert(PhysRegSUOper(&ExitSU, -1, LI.PhysReg));
  304       if (DefSU == &ExitSU)
  875       ExitSU.addPred(Dep);
 1168   if (ExitSU.getInstr() != nullptr)
 1169     dumpNodeAll(ExitSU);
 1178   else if (SU == &ExitSU)
 1192   return SuccSU == &ExitSU || !Topo.IsReachable(PredSU, SuccSU);
 1196   if (SuccSU != &ExitSU) {

lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp

  528   ReleasePredecessors(&ExitSU, CurCycle);

lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

 1599   ReleasePredecessors(&ExitSU);

lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp

  699   if (ExitSU.getNode() != nullptr)
  700     dumpNodeAll(ExitSU);

lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp

  132   if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) {

lib/Target/AMDGPU/AMDGPUSubtarget.cpp

  751         if (&SU != &DAG->ExitSU) {

lib/Target/AMDGPU/GCNILPSched.cpp

  311   releasePredecessors(&DAG.ExitSU);

lib/Target/AMDGPU/SIMachineScheduler.h

  463   SUnit& getExitSU() { return ExitSU; }