reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/AggressiveAntiDepBreaker.cpp

  788           ((SU->getDepth() + SU->Latency) >
  789            (CriticalPathSU->getDepth() + CriticalPathSU->Latency))) {

lib/CodeGen/CriticalAntiDepBreaker.cpp

  457     if (!Max || SU->getDepth() + SU->Latency > Max->getDepth() + Max->Latency)
  457     if (!Max || SU->getDepth() + SU->Latency > Max->getDepth() + Max->Latency)
  465                       << (Max->getDepth() + Max->Latency) << "\n");

lib/CodeGen/MachinePipeliner.cpp

 1043     unsigned NumCycles = getSUnit(MI)->Latency;

lib/CodeGen/MachineScheduler.cpp

 1337     unsigned LiveOutDepth = DefSU->getDepth() + DefSU->Latency;
 1357       unsigned LiveInHeight = SU->getHeight() + DefSU->Latency;

lib/CodeGen/ScheduleDAG.cpp

  349   dbgs() << "  Latency            : " << Latency << "\n";

lib/CodeGen/ScheduleDAGInstrs.cpp

  576     SU->Latency = SchedModel.computeInstrLatency(SU->getInstr());
  872     if (SU->NumSuccs == 0 && SU->Latency > 1 && (HasVRegDef || MI.mayLoad())) {
  874       Dep.setLatency(SU->Latency - 1);

lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp

  335       D.setLatency(LoadSU->Latency);
  410   FromDep.setLatency(SU->Latency);
  413   ToDep.setLatency(CopyFromSU->Latency);

lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp

 1116   D.setLatency(LoadSU->Latency);
 1258   FromDep.setLatency(SU->Latency);
 1261   ToDep.setLatency(CopyFromSU->Latency);
 2516     if (left->Latency != right->Latency)
 2516     if (left->Latency != right->Latency)
 2517       return left->Latency > right->Latency ? 1 : -1;
 2517       return left->Latency > right->Latency ? 1 : -1;

lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp

   92   SU->Latency = Old->Latency;
   92   SU->Latency = Old->Latency;
  498         unsigned OpLatency = isChain ? 1 : OpSU->Latency;
  615     SU->Latency = 0;
  621     SU->Latency = 1;
  628       SU->Latency = HighLatencyCycles;
  630       SU->Latency = 1;
  636   SU->Latency = 0;
  639       SU->Latency += TII->getInstrLatency(InstrItins, N);

lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp

  242       if (FoundSUnit->Latency)  // Don't increment CurCycle for pseudo-ops!

lib/Target/AMDGPU/GCNILPSched.cpp

  157   if (left->Latency != right->Latency)
  157   if (left->Latency != right->Latency)
  158     return left->Latency > right->Latency ? 1 : -1;
  158     return left->Latency > right->Latency ? 1 : -1;