reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
78687 return N->isDivergent(); 78709 return !N->isDivergent(); 79629 if (!N->isDivergent()) 79638 if (!Operands[i]->isDivergent() &&lib/CodeGen/SelectionDAG/DAGCombiner.cpp
14427 TLI.getRegClassFor(ResVT.getSimpleVT(), Use->isDivergent()); 14430 Use->getOperand(0)->isDivergent());lib/CodeGen/SelectionDAG/InstrEmitter.cpp
108 UseRC = TLI->getRegClassFor(VT, Node->isDivergent()); 167 DstRC = TLI->getRegClassFor(VT, Node->isDivergent()); 212 (Node->isDivergent() || (RC && TRI->isDivergentRegClass(RC)))); 274 Op.getSimpleValueType(), Op.getNode()->isDivergent()); 384 Op.getNode()->isDivergent() || 500 TLI->getRegClassFor(Node->getSimpleValueType(0), Node->isDivergent()); 534 Node->isDivergent(), Node->getDebugLoc()); 570 TLI->getRegClassFor(Node->getSimpleValueType(0), Node->isDivergent());lib/CodeGen/SelectionDAG/SelectionDAG.cpp
8192 if (To->isDivergent() != From->isDivergent()) 8192 if (To->isDivergent() != From->isDivergent()) 8248 if (To->isDivergent() != From->isDivergent()) 8248 if (To->isDivergent() != From->isDivergent()) 8295 To_IsDivergent |= ToOp->isDivergent(); 8298 if (To_IsDivergent != From->isDivergent()) 8358 if (To->isDivergent() != From->isDivergent()) 8358 if (To->isDivergent() != From->isDivergent()) 8400 IsDivergent |= Op.getNode()->isDivergent(); 8451 assert(DivergenceMap[&N] == N.isDivergent() && 9574 IsDivergent = IsDivergent || Ops[I].getNode()->isDivergent();lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
740 OS << " # D:" << isDivergent();
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp1363 if (N2->isDivergent()) { 1364 if (N3->isDivergent()) { 1380 } else if (N0->isDivergent()) { 2692 !N->isDivergent() 2699 !N->isDivergent() &&lib/Target/AMDGPU/SIISelLowering.cpp
4553 unsigned Reg = MF.addLiveIn(TRI->getReturnAddressReg(MF), getRegClassFor(VT, Op.getNode()->isDivergent())); 5648 if (!Offset->isDivergent()) { 7252 if (Ld->getAlignment() < 4 || Ld->isDivergent()) 7400 if (!Op->isDivergent() && Alignment >= 4 && NumElements < 32) { 7416 if (Subtarget->getScalarizeGlobalBehavior() && !Op->isDivergent() && 8366 N->isDivergent() && TII->pseudoToMCOpcode(AMDGPU::V_PERM_B32) != -1) { 8463 N->isDivergent() && TII->pseudoToMCOpcode(AMDGPU::V_PERM_B32) != -1) { 9442 if (!(Op0->isDivergent() ^ Op1->isDivergent())) 9442 if (!(Op0->isDivergent() ^ Op1->isDivergent())) 9445 if (Op0->isDivergent()) 9453 if (!(Op1->isDivergent() ^ Op2->isDivergent())) 9453 if (!(Op1->isDivergent() ^ Op2->isDivergent())) 9456 if (Op1->isDivergent()) 10326 getRegClassFor(VT, Src0.getNode()->isDivergent());