reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp

 6288     auto it = Inst.begin();
 6919     auto it = Inst.begin();

lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp

   83     auto I = MI.begin();
  395           MI.insert(MI.begin() + VAddr0Idx + 1 + i,
  596     MI.erase(MI.begin() + VAddr0Idx + AddrSize,
  597              MI.begin() + VAddr0Idx + Info->VAddrDwords);

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

 9898         Inst.insert(Inst.begin(),
 9928     Inst.insert(Inst.begin(), MCOperand::createReg(ARM::SP));
 9929     Inst.insert(Inst.begin(), MCOperand::createReg(ARM::SP));
 9939     Inst.insert(Inst.begin(), MCOperand::createReg(ARM::SP));
 9940     Inst.insert(Inst.begin(), MCOperand::createReg(ARM::SP));

lib/Target/ARM/Disassembler/ARMDisassembler.cpp

  732   MCInst::iterator I = MI.begin();
  827   MCInst::iterator CCI = MI.begin();
  843   MCInst::iterator VCCI = MI.begin();
  889   MCInst::iterator I = MI.begin();

lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp

  534   for (MCOperand &I : MCI)

lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp

  206         MI.erase(MI.begin () + 1);
  207         MI.erase(MI.begin ());
  214         MI.erase(MI.begin () + 1);
  215         MI.erase(MI.begin ());
  222         MI.erase(MI.begin () + 1);
  223         MI.erase(MI.begin ());
  230         MI.erase(MI.begin () + 2);
  231         MI.erase(MI.begin ());
  238         MI.erase(MI.begin () + 2);
  239         MI.erase(MI.begin ());
  246         MI.erase(MI.begin () + 2);
  247         MI.erase(MI.begin ());
  254         MI.erase(MI.begin () + 2);
  255         MI.erase(MI.begin ());
  262         MI.erase(MI.begin () + 2);
  263         MI.erase(MI.begin ());
  270         MI.erase(MI.begin () + 2);
  271         MI.erase(MI.begin ());
  281     MI.insert(MI.begin() + 1,
  285     MI.insert(MI.begin() + 2,
  451     MI.insert(MI.begin() + 1,

lib/Target/Hexagon/MCTargetDesc/HexagonMCCompound.cpp

  353            MCI.begin() + HexagonMCInstrInfo::bundleInstructionsOffset;
  364                MCI.begin() + HexagonMCInstrInfo::bundleInstructionsOffset;

lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp

  850   MCB.erase(MCB.begin() + Candidate.packetIndexJ);

lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp

  221     Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base]));
  244     Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base]));