|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
lib/CodeGen/GlobalISel/Utils.cpp 150 int DefIdx = I.getDesc().getOperandConstraint(OpI, MCOI::TIED_TO);
lib/CodeGen/MachineInstr.cpp 281 int DefIdx = MCID->getOperandConstraint(OpNo, MCOI::TIED_TO);
286 if (MCID->getOperandConstraint(OpNo, MCOI::EARLY_CLOBBER) != -1)
1415 int ExpectedTiedIdx = MCID.getOperandConstraint(I, MCOI::TIED_TO);
lib/CodeGen/MachineVerifier.cpp 1621 int TiedTo = MCID.getOperandConstraint(MONum, MCOI::TIED_TO);
1665 if (-1 == MCID.getOperandConstraint(OtherIdx, MCOI::TIED_TO))
lib/CodeGen/RegAllocFast.cpp 1052 MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1;
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 350 bool isTied = MCID.getOperandConstraint(Idx, MCOI::TIED_TO) != -1;
lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp 256 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp 1036 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
2823 if (MCID.getOperandConstraint(i+NumRes, MCOI::TIED_TO) != -1) {
3068 if (MCID.getOperandConstraint(j+NumRes, MCOI::TIED_TO) == -1)
lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp 214 if (MCID.getOperandConstraint(I, MCOI::TIED_TO) != -1)
451 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) {
lib/CodeGen/TargetInstrInfo.cpp 196 MI.getDesc().getOperandConstraint(Idx1, MCOI::TIED_TO) == 0) {
201 MI.getDesc().getOperandConstraint(Idx2, MCOI::TIED_TO) == 0) {
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 3921 (MCID.getOperandConstraint(i, MCOI::TIED_TO) == -1) &&
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 2895 Desc.getOperandConstraint(DstIdx, MCOI::EARLY_CLOBBER) == -1) {
6191 && Desc.getOperandConstraint(OpNum + 1, MCOI::OperandConstraint::TIED_TO) == -1;
6689 auto TiedTo = Desc.getOperandConstraint(Inst.getNumOperands(),
lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp 412 int Tied = MCII->get(MI.getOpcode()).getOperandConstraint(VDstIn_Idx,
lib/Target/ARM/ARMISelLowering.cpp10758 int DefIdx = MCID->getOperandConstraint(i, MCOI::TIED_TO);
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 2365 int TiedOp = MCID.getOperandConstraint(NextOpIndex, MCOI::TIED_TO);
lib/Target/ARM/Disassembler/ARMDisassembler.cpp 857 int TiedOp = ARMInsts[MI.getOpcode()].getOperandConstraint(
lib/Target/PowerPC/PPCInstrInfo.cpp 407 assert(MI.getDesc().getOperandConstraint(0, MCOI::TIED_TO) &&
lib/Target/SystemZ/SystemZHazardRecognizer.cpp 127 MID.getOperandConstraint(OpIdx, MCOI::TIED_TO) != -1)
lib/Target/SystemZ/SystemZShortenInst.cpp 68 if (MI.getDesc().getOperandConstraint(0, MCOI::TIED_TO) &&
lib/Target/X86/MCTargetDesc/X86BaseInfo.h 730 if (NumOps > 1 && Desc.getOperandConstraint(1, MCOI::TIED_TO) == 0)
735 Desc.getOperandConstraint(6, MCOI::TIED_TO) == 0)
740 if (NumOps >= 4 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
741 Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1)
745 if (NumOps == 9 && Desc.getOperandConstraint(2, MCOI::TIED_TO) == 0 &&
746 (Desc.getOperandConstraint(3, MCOI::TIED_TO) == 1 ||
747 Desc.getOperandConstraint(8, MCOI::TIED_TO) == 1))
lib/Target/X86/MCTargetDesc/X86InstComments.cpp 237 if (Desc.getOperandConstraint(MaskOp, MCOI::TIED_TO) != -1)
lib/Target/X86/X86InstrInfo.cpp 2153 if ((MI.getDesc().getOperandConstraint(Desc.getNumDefs(),
4846 NumOps > 1 && MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) != -1;
4947 0 == MI.getDesc().getOperandConstraint(CommuteOpIdx1, MCOI::TIED_TO);
4949 0 == MI.getDesc().getOperandConstraint(CommuteOpIdx2, MCOI::TIED_TO);
tools/llvm-exegesis/lib/MCInstrDescView.cpp 111 Description->getOperandConstraint(OpIndex, MCOI::TIED_TO);