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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc27452 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/AMDGPU/AMDGPUGenAsmMatcher.inc23977 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/ARM/ARMGenAsmMatcher.inc15110 << MII.getName(it->Opcode) << "\n");
15303 MII.get(Inst.getOpcode()).getDeprecatedInfo(Inst, getSTI(), Info)) {
gen/lib/Target/AVR/AVRGenAsmMatcher.inc 1305 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/BPF/BPFGenAsmMatcher.inc 950 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/Hexagon/HexagonGenAsmMatcher.inc10296 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/Lanai/LanaiGenAsmMatcher.inc 1089 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/MSP430/MSP430GenAsmMatcher.inc 1147 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/Mips/MipsGenAsmMatcher.inc 8123 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/PowerPC/PPCGenAsmMatcher.inc 7052 << MII.getName(it->Opcode) << "\n");
7185 MII.get(Inst.getOpcode()).getDeprecatedInfo(Inst, getSTI(), Info)) {
gen/lib/Target/RISCV/RISCVGenAsmMatcher.inc 2441 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/Sparc/SparcGenAsmMatcher.inc 4185 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/SystemZ/SystemZGenAsmMatcher.inc 5380 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/WebAssembly/WebAssemblyGenAsmMatcher.inc 1149 << MII.getName(it->Opcode) << "\n");
gen/lib/Target/X86/X86GenAsmMatcher.inc36980 << MII.getName(it->Opcode) << "\n");
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 3891 const MCInstrDesc &MCID = MII.get(Inst.getOpcode());
lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp 1212 return &MII;
2659 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
2718 const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
2742 const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
2812 const MCInstrDesc &Desc = MII.get(Opcode);
2891 const MCInstrDesc &Desc = MII.get(Opcode);
2929 const MCInstrDesc &Desc = MII.get(Opc);
2943 const MCInstrDesc &Desc = MII.get(Opc);
2975 const MCInstrDesc &Desc = MII.get(Opc);
3016 const MCInstrDesc &Desc = MII.get(Opc);
3036 const MCInstrDesc &Desc = MII.get(Opc);
3055 const MCInstrDesc &Desc = MII.get(Opc);
3071 const MCInstrDesc &Desc = MII.get(Opc);
3220 const MCInstrDesc &Desc = MII.get(Opcode);
3264 uint64_t TSFlags = MII.get(Inst.getOpcode()).TSFlags;
3304 const MCInstrDesc &Desc = MII.get(Opcode);
3361 const MCInstrDesc &Desc = MII.get(Opcode);
5913 const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
6200 const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
6238 const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
6305 const MCInstrDesc &Desc = MII.get(Opc);
6682 const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
6841 const MCInstrDesc &Desc = MII.get(Inst.getOpcode());
lib/Target/ARM/AsmParser/ARMAsmParser.cpp 7298 const MCInstrDesc &MCID = MII.get(Inst.getOpcode());
10187 const MCInstrDesc &MCID = MII.get(Opc);
10304 const MCInstrDesc &MCID = MII.get(Inst.getOpcode());
10337 const MCInstrDesc &MCID = MII.get(Inst.getOpcode());
10361 const MCInstrDesc &MCID = MII.get(Inst.getOpcode());
10388 const MCInstrDesc &MCID = MII.get(Inst.getOpcode());
10424 Inst.dump_pretty(dbgs(), MII.getName(Inst.getOpcode()));
10446 Inst.dump_pretty(dbgs(), MII.getName(Inst.getOpcode()));
11600 << ", opcode " << MII.getName(I.getOpcode()) << "\n");
lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp 472 HexagonMCChecker Check(getContext(), MII, getSTI(), MCB, *RI);
474 bool CheckOk = HexagonMCInstrInfo::canonicalizePacket(MII, getSTI(),
645 getParser().getContext(), MII, MCB, *SubInst);
1293 if (HexagonMCInstrInfo::getDesc(MII, Inst).isPseudo()) {
lib/Target/X86/AsmParser/X86AsmParser.cpp 3108 const MCInstrDesc &MCID = MII.get(Opc);