reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenCallingConv.inc

  153       LocVT == MVT::nxv4f16 ||
  174       LocVT == MVT::nxv4f16 ||
 1163       LocVT == MVT::nxv4f16 ||

gen/lib/Target/AArch64/AArch64GenDAGISel.inc

111786 /*249560*/        /*SwitchType*/ 18, MVT::nxv4f16,// ->249580
111792                         MVT::nxv4f16, 3/*#Ops*/, 2, 1, 4,

gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc

 5187   /* 39 */ MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64, MVT::nxv2f16, MVT::nxv4f16, MVT::nxv8f16, MVT::nxv1f32, MVT::nxv2f32, MVT::nxv4f32, MVT::nxv1f64, MVT::nxv2f64, MVT::Other,

include/llvm/Support/MachineValueType.h

  515       case nxv4f16:
  629       case nxv4f16:
  744       case nxv4f16:
 1044           if (NumElements == 4)  return MVT::nxv4f16;

lib/CodeGen/ValueTypes.cpp

  244   case MVT::nxv4f16: return "nxv4f16";
  419   case MVT::nxv4f16:

lib/Target/AArch64/AArch64ISelLowering.cpp

  179     addRegisterClass(MVT::nxv4f16, &AArch64::ZPRRegClass);

utils/TableGen/CodeGenTarget.cpp

  182   case MVT::nxv4f16:  return "MVT::nxv4f16";