|
|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
References
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc17158 /* 32847*/ OPC_CheckChild1Type, MVT::v1024i1,
41610 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
41952 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
42354 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
42540 MVT::v1024i1, 2/*#Ops*/, 0, 1,
42724 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
42752 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
42828 MVT::v1024i1, 2/*#Ops*/, 0, 1,
43422 MVT::v1024i1, 2/*#Ops*/, 0, 1,
43606 MVT::v1024i1, 2/*#Ops*/, 0, 1,
44002 MVT::v1024i1, 2/*#Ops*/, 0, 1,
44140 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
44324 MVT::v1024i1, 2/*#Ops*/, 0, 1,
44378 MVT::v1024i1, 2/*#Ops*/, 0, 1,
44512 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
44644 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
45042 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
45228 MVT::v1024i1, 2/*#Ops*/, 0, 1,
45334 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
45470 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
46076 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
46526 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
46654 MVT::v1024i1, 1/*#Ops*/, 0,
46758 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
46894 MVT::v1024i1, 2/*#Ops*/, 0, 1,
46922 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
47052 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
47080 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
47134 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
47216 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
47296 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
47478 MVT::v1024i1, 2/*#Ops*/, 0, 1,
47696 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
47750 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
47856 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
47882 MVT::v1024i1, 2/*#Ops*/, 0, 1,
47910 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
47936 MVT::v1024i1, 2/*#Ops*/, 0, 1,
47962 MVT::v1024i1, 2/*#Ops*/, 0, 1,
48042 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
48070 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
48328 MVT::v1024i1, 2/*#Ops*/, 0, 1,
48456 MVT::v1024i1, 1/*#Ops*/, 0,
48624 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
48838 MVT::v1024i1, 2/*#Ops*/, 0, 1,
48866 MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
49342 MVT::v1024i1, 2/*#Ops*/, 0, 1,
49368 MVT::v1024i1, 2/*#Ops*/, 0, 1,
49422 MVT::v32i32, MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
50186 MVT::v32i32, MVT::v1024i1, 3/*#Ops*/, 0, 1, 2,
50398 MVT::v1024i1, 1/*#Ops*/, 0,
59989 /*114632*/ /*SwitchType*/ 35, MVT::v1024i1,// ->114669
59999 MVT::v1024i1, 2/*#Ops*/, 3, 5,
66728 /*128154*/ /*SwitchType*/ 23, MVT::v1024i1,// ->128179
66734 MVT::v1024i1, 2/*#Ops*/, 0, 2,
66821 /*128317*/ /*SwitchType*/ 23, MVT::v1024i1,// ->128342
66827 MVT::v1024i1, 2/*#Ops*/, 0, 2,
66914 /*128480*/ /*SwitchType*/ 23, MVT::v1024i1,// ->128505
66920 MVT::v1024i1, 2/*#Ops*/, 0, 2,
67074 /*128815*/ OPC_CheckChild0Type, MVT::v1024i1,
gen/lib/Target/Hexagon/HexagonGenRegisterInfo.inc 2343 /* 17 */ MVT::v1024i1, MVT::v128i1, MVT::v64i1, MVT::v32i1, MVT::Other,
include/llvm/Support/MachineValueType.h 375 return (SimpleTy == MVT::v1024i1 || SimpleTy == MVT::v128i8 ||
438 case v1024i1:
553 case v1024i1:
798 case v1024i1:
913 if (NumElements == 1024) return MVT::v1024i1;
lib/CodeGen/ValueTypes.cpp 149 case MVT::v1024i1: return "v1024i1";
293 case MVT::v1024i1: return VectorType::get(Type::getInt1Ty(Context), 1024);
lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp 2212 SDVTList VTs = CurDAG->getVTList(MVT::v32i32, MVT::v1024i1);
2226 SDVTList VTs = CurDAG->getVTList(MVT::v32i32, MVT::v1024i1);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 53 addRegisterClass(MVT::v1024i1, &Hexagon::HvxQRRegClass);
utils/TableGen/CodeGenTarget.cpp 89 case MVT::v1024i1: return "MVT::v1024i1";