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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/Hexagon/HexagonGenDAGISel.inc23741 /* 45703*/ /*SwitchType*/ 10, MVT::v128i1,// ->45715
23744 MVT::v128i1, 2/*#Ops*/, 0, 1,
23824 /* 45867*/ /*SwitchType*/ 10, MVT::v128i1,// ->45879
23827 MVT::v128i1, 2/*#Ops*/, 1, 0,
23977 /* 46159*/ OPC_CheckType, MVT::v128i1,
23980 MVT::v128i1, 3/*#Ops*/, 0, 1, 2,
23986 /* 46176*/ OPC_CheckType, MVT::v128i1,
23989 MVT::v128i1, 3/*#Ops*/, 0, 1, 2,
23995 /* 46193*/ OPC_CheckType, MVT::v128i1,
23998 MVT::v128i1, 3/*#Ops*/, 0, 1, 2,
24241 /* 46646*/ OPC_CheckType, MVT::v128i1,
24244 MVT::v128i1, 3/*#Ops*/, 2, 0, 1,
24251 /* 46664*/ OPC_CheckType, MVT::v128i1,
24254 MVT::v128i1, 3/*#Ops*/, 2, 0, 1,
24261 /* 46682*/ OPC_CheckType, MVT::v128i1,
24264 MVT::v128i1, 3/*#Ops*/, 2, 0, 1,
24614 /* 47331*/ /*SwitchType*/ 10, MVT::v128i1,// ->47343
24617 MVT::v128i1, 2/*#Ops*/, 0, 1,
28041 /* 54180*/ /*SwitchType*/ 10, MVT::v128i1,// ->54192
28044 MVT::v128i1, 2/*#Ops*/, 0, 1,
28124 /* 54344*/ /*SwitchType*/ 10, MVT::v128i1,// ->54356
28127 MVT::v128i1, 2/*#Ops*/, 1, 0,
28277 /* 54636*/ OPC_CheckType, MVT::v128i1,
28280 MVT::v128i1, 3/*#Ops*/, 0, 1, 2,
28286 /* 54653*/ OPC_CheckType, MVT::v128i1,
28289 MVT::v128i1, 3/*#Ops*/, 0, 1, 2,
28295 /* 54670*/ OPC_CheckType, MVT::v128i1,
28298 MVT::v128i1, 3/*#Ops*/, 0, 1, 2,
28541 /* 55123*/ OPC_CheckType, MVT::v128i1,
28544 MVT::v128i1, 3/*#Ops*/, 2, 0, 1,
28551 /* 55141*/ OPC_CheckType, MVT::v128i1,
28554 MVT::v128i1, 3/*#Ops*/, 2, 0, 1,
28561 /* 55159*/ OPC_CheckType, MVT::v128i1,
28564 MVT::v128i1, 3/*#Ops*/, 2, 0, 1,
28914 /* 55808*/ /*SwitchType*/ 10, MVT::v128i1,// ->55820
28917 MVT::v128i1, 2/*#Ops*/, 0, 1,
30585 /* 59157*/ OPC_CheckType, MVT::v128i1,
30590 MVT::v128i1, 2/*#Ops*/, 0, 1,
30597 MVT::v128i1, 2/*#Ops*/, 0, 1,
30604 MVT::v128i1, 2/*#Ops*/, 0, 1,
54291 /*102576*/ OPC_SwitchType /*4 cases */, 9, MVT::v128i1,// ->102588
54294 MVT::v128i1, 1/*#Ops*/, 0,
54357 /*102686*/ OPC_SwitchType /*4 cases */, 9, MVT::v128i1,// ->102698
54360 MVT::v128i1, 1/*#Ops*/, 0,
54429 /*102813*/ OPC_SwitchType /*4 cases */, 9, MVT::v128i1,// ->102825
54432 MVT::v128i1, 1/*#Ops*/, 0,
54498 /*102933*/ OPC_CheckType, MVT::v128i1,
54501 MVT::v128i1, 3/*#Ops*/, 0, 1, 2,
54507 /*102950*/ OPC_CheckType, MVT::v128i1,
54510 MVT::v128i1, 3/*#Ops*/, 0, 1, 2,
54516 /*102967*/ OPC_CheckType, MVT::v128i1,
54519 MVT::v128i1, 3/*#Ops*/, 0, 1, 2,
54776 /*103446*/ OPC_SwitchType /*4 cases */, 9, MVT::v128i1,// ->103458
54779 MVT::v128i1, 1/*#Ops*/, 0,
54834 /*103547*/ OPC_CheckType, MVT::v128i1,
54837 MVT::v128i1, 3/*#Ops*/, 2, 0, 1,
54844 /*103565*/ OPC_CheckType, MVT::v128i1,
54847 MVT::v128i1, 3/*#Ops*/, 2, 0, 1,
54854 /*103583*/ OPC_CheckType, MVT::v128i1,
54857 MVT::v128i1, 3/*#Ops*/, 2, 0, 1,
55208 /*104233*/ /*SwitchType*/ 10, MVT::v128i1,// ->104245
55211 MVT::v128i1, 2/*#Ops*/, 0, 1,
64018 /*122833*/ /*SwitchType*/ 25, MVT::v128i1,// ->122860
64025 MVT::v128i1, 2/*#Ops*/, 0, 2,
68507 /*132682*/ OPC_SwitchType /*7 cases */, 29|128,1/*157*/, MVT::v128i1,// ->132843
69392 /*134278*/ OPC_SwitchType /*4 cases */, 16, MVT::v128i1,// ->134297
69508 /*134493*/ OPC_SwitchType /*4 cases */, 16, MVT::v128i1,// ->134512
69620 /*134698*/ OPC_CheckChild0Type, MVT::v128i1,
71375 /*138827*/ OPC_SwitchType /*4 cases */, 8, MVT::v128i1,// ->138838
71378 MVT::v128i1, 0/*#Ops*/,
71437 /*138926*/ OPC_SwitchType /*4 cases */, 8, MVT::v128i1,// ->138937
71440 MVT::v128i1, 0/*#Ops*/,
71944 /*140119*/ OPC_SwitchType /*3 cases */, 15|128,1/*143*/, MVT::v128i1,// ->140266
71978 MVT::v128i1, 2/*#Ops*/, 16, 18,
gen/lib/Target/Hexagon/HexagonGenRegisterInfo.inc 2343 /* 17 */ MVT::v1024i1, MVT::v128i1, MVT::v64i1, MVT::v32i1, MVT::Other,
include/llvm/Support/MachineValueType.h 350 return (SimpleTy == MVT::v128i1 || SimpleTy == MVT::v16i8 ||
435 case v128i1:
563 case v128i1:
753 case v128i1:
910 if (NumElements == 128) return MVT::v128i1;
lib/CodeGen/ValueTypes.cpp 146 case MVT::v128i1: return "v128i1";
290 case MVT::v128i1: return VectorType::get(Type::getInt1Ty(Context), 128);
lib/Target/Hexagon/HexagonISelLoweringHVX.cpp 52 addRegisterClass(MVT::v128i1, &Hexagon::HvxQRRegClass);
utils/TableGen/CodeGenTarget.cpp 87 case MVT::v128i1: return "MVT::v128i1";