reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenGlobalISel.inc

40593         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
40650         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
40707         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,

gen/lib/Target/ARM/ARMGenGlobalISel.inc

25350         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
25374         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
25465         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
25490         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
25654         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
25676         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
25767         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
25791         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
26650         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
26772         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
26894         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,

gen/lib/Target/Mips/MipsGenGlobalISel.inc

19690         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
19712         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
19774         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
19796         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
19819         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
19841         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
19913         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
19936         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
19975         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
19998         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
20045         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
20108         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
20130         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
20204         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
20244         GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_FMUL,
20728         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
20754         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
20781         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
20807         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
20832         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
20858         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
20918         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
20945         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
20972         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
21000         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
21027         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
21054         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
21080         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
21107         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,
21134         GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_FMUL,

include/llvm/CodeGen/GlobalISel/IRTranslator.h

  436     return translateBinaryOp(TargetOpcode::G_FMUL, U, MIRBuilder);

include/llvm/CodeGen/GlobalISel/MIPatternMatch.h

  218 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_FMUL, true>
  220   return BinaryOp_match<LHS, RHS, TargetOpcode::G_FMUL, true>(L, R);

include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

 1279     return buildInstr(TargetOpcode::G_FMUL, {Dst}, {Src0, Src1}, Flags);

lib/CodeGen/GlobalISel/IRTranslator.cpp

 1422       auto FMul = MIRBuilder.buildInstr(TargetOpcode::G_FMUL, {Ty}, {Op0, Op1},

lib/CodeGen/GlobalISel/LegalizerHelper.cpp

  281   case TargetOpcode::G_FMUL:
  513   case TargetOpcode::G_FMUL:
 1822   case TargetOpcode::G_FMUL:
 2961   case G_FMUL:

lib/Target/AArch64/AArch64InstructionSelector.cpp

  486       case TargetOpcode::G_FMUL:
  499       case TargetOpcode::G_FMUL:
 1851   case TargetOpcode::G_FMUL:

lib/Target/AArch64/AArch64LegalizerInfo.cpp

  148   getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FNEG})

lib/Target/AArch64/AArch64RegisterBankInfo.cpp

  391   case TargetOpcode::G_FMUL:
  543   case TargetOpcode::G_FMUL:

lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

  335     { G_FADD, G_FMUL, G_FMA, G_FCANONICALIZE})

lib/Target/ARM/ARMLegalizerInfo.cpp

  173         {G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FCONSTANT, G_FNEG})
  195     getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV})

lib/Target/ARM/ARMRegisterBankInfo.cpp

  289   case G_FMUL:

lib/Target/Mips/MipsLegalizerInfo.cpp

  191   getActionDefinitionsBuilder({G_FADD, G_FSUB, G_FMUL, G_FDIV, G_FABS, G_FSQRT})
  432     return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_FMUL, MIRBuilder, ST);

lib/Target/Mips/MipsRegisterBankInfo.cpp

  113   case TargetOpcode::G_FMUL:
  544   case G_FMUL:

lib/Target/X86/X86LegalizerInfo.cpp

  293   for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
  329   for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})

lib/Target/X86/X86RegisterBankInfo.cpp

  181   case TargetOpcode::G_FMUL:

unittests/CodeGen/GlobalISel/PatternMatchTest.cpp

   96   auto MIBFMul = B.buildInstr(TargetOpcode::G_FMUL, {s64},