reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
286 BCase(EF_ARM_SOFT_FLOAT); 287 BCase(EF_ARM_VFP_FLOAT); 296 BCase(EF_MIPS_NOREORDER); 297 BCase(EF_MIPS_PIC); 298 BCase(EF_MIPS_CPIC); 299 BCase(EF_MIPS_ABI2); 300 BCase(EF_MIPS_32BITMODE); 301 BCase(EF_MIPS_FP64); 302 BCase(EF_MIPS_NAN2008); 303 BCase(EF_MIPS_MICROMIPS); 304 BCase(EF_MIPS_ARCH_ASE_M16); 305 BCase(EF_MIPS_ARCH_ASE_MDMX); 341 BCase(EF_HEXAGON_MACH_V2); 342 BCase(EF_HEXAGON_MACH_V3); 343 BCase(EF_HEXAGON_MACH_V4); 344 BCase(EF_HEXAGON_MACH_V5); 345 BCase(EF_HEXAGON_MACH_V55); 346 BCase(EF_HEXAGON_MACH_V60); 347 BCase(EF_HEXAGON_MACH_V62); 348 BCase(EF_HEXAGON_MACH_V65); 349 BCase(EF_HEXAGON_ISA_V2); 350 BCase(EF_HEXAGON_ISA_V3); 351 BCase(EF_HEXAGON_ISA_V4); 352 BCase(EF_HEXAGON_ISA_V5); 353 BCase(EF_HEXAGON_ISA_V55); 354 BCase(EF_HEXAGON_ISA_V60); 355 BCase(EF_HEXAGON_ISA_V62); 356 BCase(EF_HEXAGON_ISA_V65); 359 BCase(EF_AVR_ARCH_AVR1); 360 BCase(EF_AVR_ARCH_AVR2); 361 BCase(EF_AVR_ARCH_AVR25); 362 BCase(EF_AVR_ARCH_AVR3); 363 BCase(EF_AVR_ARCH_AVR31); 364 BCase(EF_AVR_ARCH_AVR35); 365 BCase(EF_AVR_ARCH_AVR4); 366 BCase(EF_AVR_ARCH_AVR51); 367 BCase(EF_AVR_ARCH_AVR6); 368 BCase(EF_AVR_ARCH_AVRTINY); 369 BCase(EF_AVR_ARCH_XMEGA1); 370 BCase(EF_AVR_ARCH_XMEGA2); 371 BCase(EF_AVR_ARCH_XMEGA3); 372 BCase(EF_AVR_ARCH_XMEGA4); 373 BCase(EF_AVR_ARCH_XMEGA5); 374 BCase(EF_AVR_ARCH_XMEGA6); 375 BCase(EF_AVR_ARCH_XMEGA7); 378 BCase(EF_RISCV_RVC); 383 BCase(EF_RISCV_RVE); 423 BCase(EF_AMDGPU_XNACK); 424 BCase(EF_AMDGPU_SRAM_ECC); 506 BCase(PF_X); 507 BCase(PF_W); 508 BCase(PF_R); 515 BCase(SHF_WRITE); 516 BCase(SHF_ALLOC); 517 BCase(SHF_EXCLUDE); 518 BCase(SHF_EXECINSTR); 519 BCase(SHF_MERGE); 520 BCase(SHF_STRINGS); 521 BCase(SHF_INFO_LINK); 522 BCase(SHF_LINK_ORDER); 523 BCase(SHF_OS_NONCONFORMING); 524 BCase(SHF_GROUP); 525 BCase(SHF_TLS); 526 BCase(SHF_COMPRESSED); 529 BCase(SHF_ARM_PURECODE); 532 BCase(SHF_HEX_GPREL); 535 BCase(SHF_MIPS_NODUPES); 536 BCase(SHF_MIPS_NAMES); 537 BCase(SHF_MIPS_LOCAL); 538 BCase(SHF_MIPS_NOSTRIP); 539 BCase(SHF_MIPS_GPREL); 540 BCase(SHF_MIPS_MERGE); 541 BCase(SHF_MIPS_ADDR); 542 BCase(SHF_MIPS_STRING); 545 BCase(SHF_X86_64_LARGE); 797 BCase(DSP); 798 BCase(DSPR2); 799 BCase(EVA); 800 BCase(MCU); 801 BCase(MDMX); 802 BCase(MIPS3D); 803 BCase(MT); 804 BCase(SMARTMIPS); 805 BCase(VIRT); 806 BCase(MSA); 807 BCase(MIPS16); 808 BCase(MICROMIPS); 809 BCase(XPA); 816 BCase(ODDSPREG);lib/ObjectYAML/WasmYAML.cpp
518 BCase(HAS_MAX); 519 BCase(IS_SHARED);tools/lld/lib/ReaderWriter/MachO/MachONormalizedFileYAML.cpp
163 io.bitSetCase(value, "MH_TWOLEVEL", 165 io.bitSetCase(value, "MH_SUBSECTIONS_VIA_SYMBOLS", 224 io.bitSetCase(value, "S_ATTR_PURE_INSTRUCTIONS", 226 io.bitSetCase(value, "S_ATTR_SOME_INSTRUCTIONS", 228 io.bitSetCase(value, "S_ATTR_NO_DEAD_STRIP", 230 io.bitSetCase(value, "S_ATTR_EXT_RELOC", 232 io.bitSetCase(value, "S_ATTR_LOC_RELOC", 234 io.bitSetCase(value, "S_ATTR_DEBUG", 276 io.bitSetCase(value, "N_EXT", llvm::MachO::N_EXT); 277 io.bitSetCase(value, "N_PEXT", llvm::MachO::N_PEXT); 284 io.bitSetCase(value, "N_NO_DEAD_STRIP", llvm::MachO::N_NO_DEAD_STRIP); 285 io.bitSetCase(value, "N_WEAK_REF", llvm::MachO::N_WEAK_REF); 286 io.bitSetCase(value, "N_WEAK_DEF", llvm::MachO::N_WEAK_DEF); 287 io.bitSetCase(value, "N_ARM_THUMB_DEF", llvm::MachO::N_ARM_THUMB_DEF); 288 io.bitSetCase(value, "N_SYMBOL_RESOLVER", llvm::MachO::N_SYMBOL_RESOLVER); 643 io.bitSetCase(value, "EXPORT_SYMBOL_FLAGS_WEAK_DEFINITION", 645 io.bitSetCase(value, "EXPORT_SYMBOL_FLAGS_REEXPORT", 647 io.bitSetCase(value, "EXPORT_SYMBOL_FLAGS_STUB_AND_RESOLVER",