|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
Declarations
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h 418 MachineInstrBuilder buildGEP(const DstOp &Res, const SrcOp &Op0,
References
lib/CodeGen/GlobalISel/CombinerHelper.cpp 1019 Ptr = MIB.buildGEP(PtrTy, Dst, Offset).getReg(0);
1124 LoadPtr = MIB.buildGEP(PtrTy, Src, Offset).getReg(0);
1130 CurrOffset == 0 ? Dst : MIB.buildGEP(PtrTy, Dst, Offset).getReg(0);
1221 LoadPtr = MIB.buildGEP(PtrTy, Src, Offset).getReg(0);
1238 StorePtr = MIB.buildGEP(PtrTy, Dst, Offset).getReg(0);
lib/CodeGen/GlobalISel/IRTranslator.cpp 1084 MIRBuilder.buildGEP(PtrTy, BaseReg, OffsetMIB.getReg(0)).getReg(0);
1103 BaseReg = MIRBuilder.buildGEP(PtrTy, BaseReg, GepOffsetReg).getReg(0);
1110 MIRBuilder.buildGEP(getOrCreateVReg(U), BaseReg, OffsetMIB.getReg(0));
lib/CodeGen/GlobalISel/LegalizerHelper.cpp 2087 auto SmallPtr = MIRBuilder.buildGEP(GEPReg, PtrReg, OffsetCst.getReg(0));
2159 auto SmallPtr = MIRBuilder.buildGEP(GEPReg, PtrReg, OffsetCst.getReg(0));
lib/CodeGen/GlobalISel/MachineIRBuilder.cpp 245 return buildGEP(Res, Op0, Cst.getReg(0));
lib/Target/AArch64/AArch64CallLowering.cpp 163 MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg);
lib/Target/AArch64/AArch64LegalizerInfo.cpp 746 auto ListTmp = MIRBuilder.buildGEP(PtrTy, List, AlignMinus1.getReg(0));
761 auto NewList = MIRBuilder.buildGEP(PtrTy, DstPtr, Size.getReg(0));
lib/Target/AMDGPU/AMDGPUCallLowering.cpp 359 B.buildGEP(DstReg, KernArgSegmentVReg, OffsetReg);
lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp 2034 B.buildGEP(DstReg, KernargPtrReg, B.buildConstant(IdxTy, Offset).getReg(0));
lib/Target/ARM/ARMCallLowering.cpp 109 MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg);
lib/Target/Mips/MipsCallLowering.cpp 302 MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg);
lib/Target/X86/X86CallLowering.cpp 118 MIRBuilder.buildGEP(AddrReg, SPReg, OffsetReg);