reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h

  340   MachineInstrBuilder buildInstrNoInsert(unsigned Opcode);

References

lib/CodeGen/GlobalISel/LegalizerHelper.cpp

 2462         NewInsts.push_back(MIRBuilder.buildInstrNoInsert(MI.getOpcode())
 2470         NewInsts.push_back(MIRBuilder.buildInstrNoInsert(MI.getOpcode())

lib/CodeGen/GlobalISel/MachineIRBuilder.cpp

   75   return insertInstr(buildInstrNoInsert(Opcode));

lib/CodeGen/GlobalISel/RegBankSelect.cpp

  163     MI = MIRBuilder.buildInstrNoInsert(TargetOpcode::COPY)
  193         MIRBuilder.buildInstrNoInsert(MergeOp)
  202         MIRBuilder.buildInstrNoInsert(TargetOpcode::G_UNMERGE_VALUES);

lib/Target/AArch64/AArch64CallLowering.cpp

  260   auto MIB = MIRBuilder.buildInstrNoInsert(AArch64::RET_ReallyLR);
  809   auto MIB = MIRBuilder.buildInstrNoInsert(Opc);
  970   auto MIB = MIRBuilder.buildInstrNoInsert(Opc);

lib/Target/AMDGPU/AMDGPUCallLowering.cpp

  317   auto Ret = B.buildInstrNoInsert(ReturnOpc);

lib/Target/ARM/ARMCallLowering.cpp

  272   auto Ret = MIRBuilder.buildInstrNoInsert(Opcode).add(predOps(ARMCC::AL));
  523   auto MIB = MIRBuilder.buildInstrNoInsert(CallOpcode);

lib/Target/Mips/MipsCallLowering.cpp

  417   MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(Mips::RetRA);
  569   MachineInstrBuilder MIB = MIRBuilder.buildInstrNoInsert(

lib/Target/RISCV/RISCVCallLowering.cpp

   28   MachineInstrBuilder Ret = MIRBuilder.buildInstrNoInsert(RISCV::PseudoRET);

lib/Target/X86/X86CallLowering.cpp

  192   auto MIB = MIRBuilder.buildInstrNoInsert(X86::RET).addImm(0);
  403   auto MIB = MIRBuilder.buildInstrNoInsert(CallOpc)