reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
  891   MachineInstrBuilder buildTrunc(const DstOp &Res, const SrcOp &Op);

References

lib/CodeGen/GlobalISel/CallLowering.cpp
  340           MIRBuilder.buildTrunc(ArgReg, {NewReg}).getReg(0);
lib/CodeGen/GlobalISel/CombinerHelper.cpp
  444     MachineInstr *NewMI = Builder.buildTrunc(NewDstReg, ChosenDstReg);
 1005         Value = MIB.buildTrunc(Ty, MemSetValue).getReg(0);
lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  855       MIRBuilder.buildTrunc(TmpReg, SrcReg);
 1001       auto TruncMIB = MIRBuilder.buildTrunc(NarrowTy, MO1.getReg());
 1197       MIRBuilder.buildTrunc(DstReg, ResultReg);
 1268     MIRBuilder.buildTrunc(DstReg, FinalMerge.getReg(0));
 1347       MIRBuilder.buildTrunc(DstReg,
 1363     MIRBuilder.buildTrunc(DstReg, LShr);
 1443     MIRBuilder.buildTrunc(MI.getOperand(0).getReg(), NewOp);
 1511     MIRBuilder.buildTrunc(DstReg, ShrReg);
 1529     MIRBuilder.buildTrunc(DstReg, Shift);
 2094         MIRBuilder.buildTrunc(DstReg, {Or.getReg(0)});
 3830   auto V = MIRBuilder.buildOr(S32, ShlE, MIRBuilder.buildTrunc(S32, UShl));
 4010     auto Trunc = MIRBuilder.buildTrunc(Src0Ty, Shift);
 4085     MIRBuilder.buildTrunc(Dst0Reg, Cast);
 4092       MIRBuilder.buildTrunc(MI.getOperand(I), Shift);
 4215       MIRBuilder.buildTrunc(Dst, Src);
 4219       MIRBuilder.buildTrunc(Dst, Shr);
lib/Target/AArch64/AArch64CallLowering.cpp
   82       MIRBuilder.buildTrunc(ValVReg, Copy);
lib/Target/AMDGPU/AMDGPUCallLowering.cpp
  102       MIRBuilder.buildTrunc(ValVReg, Copy);
  111       MIRBuilder.buildTrunc(ValVReg, Copy);
  546     B.buildTrunc(OrigRegs[0], BV);
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
 1563         B.buildTrunc(DstReg, Sel);
lib/Target/ARM/ARMCallLowering.cpp
  323       MIRBuilder.buildTrunc(ValVReg, LoadVReg);
  360       MIRBuilder.buildTrunc(ValVReg, PhysRegToVReg);
lib/Target/ARM/ARMLegalizerInfo.cpp
  444         MIRBuilder.buildTrunc(ProcessedResult, LibcallResult);
lib/Target/Mips/MipsCallLowering.cpp
  169       MIRBuilder.buildTrunc(ValVReg, Copy);
  208     MIRBuilder.buildTrunc(ValVReg, LoadReg);
lib/Target/X86/X86CallLowering.cpp
  275         MIRBuilder.buildTrunc(ValVReg, Copy);
  286       MIRBuilder.buildTrunc(ValVReg, Copy);
unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
  138   auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
  171   auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
  291   auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
  333   auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
  368   auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
  404   auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
  437   auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
  471   auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
  505   auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
  544   auto MIBTrunc = B.buildTrunc(s8, Copies[0]);
 1037   auto Lo = B.buildTrunc(S32, Copies[0]);
 1038   auto Hi = B.buildTrunc(S32, Copies[1]);
unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
  202   auto MIBTrunc = B.buildTrunc(s32, Copies[0]);