reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/MachineInstr.h

 1525   void print(raw_ostream &OS, bool IsStandalone = true, bool SkipOpers = false,

References

include/llvm/CodeGen/MachineInstr.h

 1728   MI.print(OS);

lib/CodeGen/GlobalISel/Combiner.cpp

   86       MI->print(dbgs());

lib/CodeGen/GlobalISel/LegalizerHelper.cpp

   84   LLVM_DEBUG(dbgs() << "Legalizing: "; MI.print(dbgs()));

lib/CodeGen/MIRCanonicalizerPass.cpp

  110     II->print(OS);

lib/CodeGen/MachineCombiner.cpp

  564           InstrPtr->print(dbgs(), /*IsStandalone*/false, /*SkipOpers*/false,
  568           InstrPtr->print(dbgs(), /*IsStandalone*/false, /*SkipOpers*/false,

lib/CodeGen/MachineInstr.cpp

 1450   print(dbgs());

lib/CodeGen/MachineOptimizationRemarkEmitter.cpp

   29   MI.print(OS, /*IsStandalone=*/true, /*SkipOpers=*/false,

lib/CodeGen/MachinePipeliner.cpp

 2878       CI->getInstr()->print(os);

lib/CodeGen/MachineVerifier.cpp

  506   MI->print(errs(), /*SkipOpers=*/true);

lib/CodeGen/ScheduleDAGInstrs.cpp

 1181     SU->getInstr()->print(oss, /*SkipOpers=*/true);

lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp

  290     StartInst->print(OS, /* SkipOpers= */true);
  292     LastInst->print(OS, /* SkipOpers= */true);
  295       KillInst->print(OS, /* SkipOpers= */true);

lib/Target/AArch64/AArch64CondBrTuning.cpp

  204       LLVM_DEBUG(DefMI.print(dbgs()));
  206       LLVM_DEBUG(MI.print(dbgs()));
  263       LLVM_DEBUG(DefMI.print(dbgs()));
  265       LLVM_DEBUG(MI.print(dbgs()));
  278   LLVM_DEBUG(NewCmp->print(dbgs()));
  280   LLVM_DEBUG(NewBr->print(dbgs()));

lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp

  154                  MI.print(dbgs()));
  176       LLVM_DEBUG(MI.print(dbgs()));

lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

  773   LLVM_DEBUG(I->print(dbgs()));
  775   LLVM_DEBUG(MergeMI->print(dbgs()));
  777   LLVM_DEBUG(((MachineInstr *)MIB)->print(dbgs()));
  892   LLVM_DEBUG(I->print(dbgs()));
  894   LLVM_DEBUG(Paired->print(dbgs()));
  909     LLVM_DEBUG(((MachineInstr *)MIB)->print(dbgs()));
  928     LLVM_DEBUG(((MachineInstr *)MIBSXTW)->print(dbgs()));
  930     LLVM_DEBUG(((MachineInstr *)MIB)->print(dbgs()));
  971       LLVM_DEBUG(LoadI->print(dbgs()));
 1045   LLVM_DEBUG(StoreI->print(dbgs()));
 1047   LLVM_DEBUG(LoadI->print(dbgs()));
 1049   LLVM_DEBUG(StoreI->print(dbgs()));
 1051   LLVM_DEBUG((BitExtMI)->print(dbgs()));
 1427   LLVM_DEBUG(I->print(dbgs()));
 1429   LLVM_DEBUG(Update->print(dbgs()));
 1431   LLVM_DEBUG(((MachineInstr *)MIB)->print(dbgs()));

lib/Target/AArch64/AArch64PBQPRegAlloc.cpp

  343                      MI.print(dbgs()););

lib/Target/AMDGPU/AMDGPUMCInstLower.cpp

  268     MI->print(errs());
  392     MI->print(errs());

lib/Target/AMDGPU/SIInsertWaitcnts.cpp

 1420       Inst.print(dbgs());

lib/Target/ARM/ARMAsmPrinter.cpp

 1107       MI->print(errs());
 1165         MI->print(errs());
 1220       MI->print(errs());
 1228       MI->print(errs());

lib/Target/ARM/ARMISelLowering.cpp

10405     MI.print(errs());

lib/Target/AVR/AVRMCInstLower.cpp

   70       MI.print(errs());

lib/Target/BPF/BPFMCInstLower.cpp

   56       MI->print(errs());

lib/Target/Hexagon/HexagonMCInstLower.cpp

  119       MI->print(errs());

lib/Target/Lanai/LanaiMCInstLower.cpp

  132       MI->print(errs());

lib/Target/MSP430/MSP430MCInstLower.cpp

  124       MI->print(errs());

lib/Target/PowerPC/PPCExpandISEL.cpp

  175       LLVM_DEBUG(dbgs() << "    "; VI->print(dbgs()));

lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp

  217       MI->print(errs());
  220       MI->print(errs());

lib/Target/X86/X86DomainReassignment.cpp

  364       MI->print(dbgs());

lib/Target/X86/X86FloatingPoint.cpp

  489         Start->print(dbgs());

lib/Target/X86/X86InstructionSelector.cpp

  334   LLVM_DEBUG(dbgs() << " C++ instruction selection: "; I.print(dbgs()));

lib/Target/X86/X86MCInstLower.cpp

  402     MI->print(errs());

lib/Target/XCore/XCoreRegisterInfo.cpp

  278   LLVM_DEBUG(MI.print(errs()));

unittests/CodeGen/MachineInstrTest.cpp

  335   MI->print(OS, /*IsStandalone*/true, /*SkipOpers*/false, /*SkipDebugLoc*/false,