|
reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
|
Declarations
include/llvm/CodeGen/MachineInstr.h 1355 void tieOperands(unsigned DefIdx, unsigned UseIdx);
References
lib/CodeGen/GlobalISel/Utils.cpp 152 I.tieOperands(DefIdx, OpI);
lib/CodeGen/MIRParser/MIParser.cpp 1389 MI.tieOperands(TiedPair.first, TiedPair.second);
lib/CodeGen/MachineInstr.cpp 283 tieOperands(DefIdx, OpNo);
lib/CodeGen/ModuloSchedule.cpp 990 NewMI->tieOperands(i, UseIdx);
lib/CodeGen/SelectionDAG/InstrEmitter.cpp 1124 MIB->tieOperands(DefIdx + j, UseIdx + j);
lib/Target/AMDGPU/SIAddIMGInit.cpp 171 MI.tieOperands(DstIdx, MI.getNumOperands() - 1);
lib/Target/AMDGPU/SIInstrInfo.cpp 1498 MovRel->tieOperands(ImpDefIdx, ImpUseIdx);
lib/Target/AMDGPU/SIPeepholeSDWA.cpp 515 MI.tieOperands(AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::vdst),
1137 SDWAInst->tieOperands(PreserveDstIdx, SDWAInst->getNumOperands() - 1);
lib/Target/AMDGPU/SIShrinkInstructions.cpp 304 MI.tieOperands(
376 MI.tieOperands(0, 2);
656 MI.tieOperands(0, 1);
lib/Target/ARM/ARMBaseInstrInfo.cpp 2282 NewMI->tieOperands(0, NewMI->getNumOperands() - 1);
lib/Target/ARM/ARMISelLowering.cpp10760 MI.tieOperands(DefIdx, i);
lib/Target/Hexagon/HexagonExpandCondsets.cpp 521 DefI->tieOperands(P.second, DefI->getNumOperands()-1);
lib/Target/Lanai/LanaiInstrInfo.cpp 534 NewMI->tieOperands(0, NewMI->getNumOperands() - 1);
lib/Target/SystemZ/SystemZInstrInfo.cpp 168 MI.tieOperands(0, 1);
664 UseMI.tieOperands(0, 1);
lib/Target/SystemZ/SystemZPostRewrite.cpp 224 MI.tieOperands(0, 1);
lib/Target/SystemZ/SystemZShortenInst.cpp 70 MI.tieOperands(0, 1);
184 MI.tieOperands(0, 1);
190 MI.tieOperands(0, 1);
345 MI.tieOperands(0, 1);