reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/CodeGen/RegisterCoalescer.cpp
  623   LLVM_DEBUG(dbgs() << "Extending: " << printReg(IntB.reg, TRI));
  666   CopyMI->substituteRegister(IntA.reg, IntB.reg, 0, *TRI);
  881       UseMO.substPhysReg(NewReg, *TRI);
  952           Indexes, *TRI);
 1255   const TargetRegisterClass *DefRC = TII->getRegClass(MCID, 0, TRI, *MF);
 1260       unsigned NewDstIdx = TRI->composeSubRegIndices(CP.getSrcIdx(),
 1263         NewDstReg = TRI->getSubReg(DstReg, NewDstIdx);
 1281   TII->reMaterialize(*MBB, MII, DstReg, SrcIdx, *DefMI, *TRI);
 1298         TRI->getCommonSubClass(DefRC, DstRC);
 1349         NewRC = TRI->getMatchingSuperRegClass(NewRC, DefRC, NewIdx);
 1351         NewRC = TRI->getCommonSubClass(NewRC, DefRC);
 1357       SR.LaneMask = TRI->composeSubRegIndexLaneMask(DstIdx, SR.LaneMask);
 1411       LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(NewIdx);
 1453     for (MCRegUnitIterator Units(NewMI.getOperand(0).getReg(), TRI);
 1469     for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units)
 1484           UseMO.substPhysReg(DstReg, *TRI);
 1527   if(!isMoveInstr(*TRI, CopyMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx))
 1534     LaneBitmask SrcMask = TRI->getSubRegIndexLaneMask(SrcSubIdx);
 1573     LaneBitmask DstMask = TRI->getSubRegIndexLaneMask(DstSubIdx);
 1592     LaneBitmask UseMask = TRI->getSubRegIndexLaneMask(MO.getSubReg());
 1627   LaneBitmask Mask = TRI->getSubRegIndexLaneMask(SubRegIdx);
 1719         MO.substPhysReg(DstReg, *TRI);
 1721         MO.substVirtReg(DstReg, SubIdx, *TRI);
 1755   CoalescerPair CP(*TRI);
 1770     if (!TRI->shouldCoalesce(CopyMI, SrcRC, SrcIdx, DstRC, DstIdx,
 1829                       << printReg(CP.getSrcReg(), TRI) << " with "
 1830                       << printReg(CP.getDstReg(), TRI, CP.getSrcIdx()) << '\n');
 1849              << TRI->getRegClassName(CP.getNewRC()) << " with ";
 1852                << TRI->getSubRegIndexName(CP.getDstIdx()) << " and "
 1854                << TRI->getSubRegIndexName(CP.getSrcIdx()) << '\n';
 1856         dbgs() << printReg(CP.getSrcReg(), TRI) << " in "
 1857                << printReg(CP.getDstReg(), TRI, CP.getSrcIdx()) << '\n';
 1961   TRI->updateRegAllocHint(CP.getSrcReg(), CP.getDstReg(), *MF);
 1964     dbgs() << "\tSuccess: " << printReg(CP.getSrcReg(), TRI, CP.getSrcIdx())
 1965            << " -> " << printReg(CP.getDstReg(), TRI, CP.getDstIdx()) << '\n';
 1968       dbgs() << printReg(CP.getDstReg(), TRI);
 1996     for (MCRegUnitIterator UI(DstReg, TRI); UI.isValid(); ++UI) {
 1998       for (MCRegUnitRootIterator RI(*UI, TRI); RI.isValid(); ++RI) {
 2003         LLVM_DEBUG(dbgs() << "\t\tInterference: " << printRegUnit(*UI, TRI)
 2065         if (MI->readsRegister(DstReg, TRI)) {
 2075                       << printReg(DstReg, TRI) << " at " << CopyRegIdx << "\n");
 2079     for (MCRegUnitIterator UI(DstReg, TRI); UI.isValid(); ++UI) {
 3214                    NewVNInfo, CP, LIS, TRI, true, true);
 3216                    NewVNInfo, CP, LIS, TRI, true, true);
 3288       *LIS->getSlotIndexes(), *TRI);
 3308                    NewVNInfo, CP, LIS, TRI, false, TrackSubRegLiveness);
 3310                    NewVNInfo, CP, LIS, TRI, false, TrackSubRegLiveness);
 3335                                      : TRI->getSubRegIndexLaneMask(DstIdx);
 3342         LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(DstIdx, R.LaneMask);
 3353                                      : TRI->getSubRegIndexLaneMask(SrcIdx);
 3358         LaneBitmask Mask = TRI->composeSubRegIndexLaneMask(SrcIdx, R.LaneMask);
 3526   if (!isMoveInstr(*TRI, &Copy, SrcReg, DstReg, SrcSubReg, DstSubReg))
 3550     if (!isMoveInstr(*TRI, &Copy, OtherSrcReg, OtherReg, OtherSrcSubReg,
 3680   TRI = STI.getRegisterInfo();
 3721                         << TRI->getRegClassName(MRI->getRegClass(Reg)) << '\n');