reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
376 Edit = &LRE; 391 Edit->anyRematerializable(nullptr); 427 auto &PS = getSubRangeForMask(S.LaneMask, Edit->getParent()); 462 assert(Edit->getParent().getVNInfoAt(Idx) == ParentVNI && "Bad Parent VNI"); 463 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); 506 addDeadDef(LIS.getInterval(Edit->get(RegIdx)), VNI, false); 553 LiveInterval &DestLI = LIS.getInterval(Edit->get(RegIdx)); 633 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); 640 unsigned Original = VRM.getOriginal(Edit->get(RegIdx)); 649 if (Edit->canRematerializeAt(RM, OrigVNI, UseIdx, true)) { 650 Def = Edit->rematerializeAt(MBB, I, Reg, RM, TRI, Late); 666 Def = buildCopy(Edit->getReg(), Reg, LaneMask, MBB, I, Late, RegIdx); 676 if (Edit->empty()) 677 Edit->createEmptyInterval(); 680 OpenIdx = Edit->size(); 681 Edit->createEmptyInterval(); 687 assert(Idx < Edit->size() && "Can only select previously opened interval"); 696 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx); 713 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx); 733 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Last); 764 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Boundary); 778 MI->readsVirtualRegister(Edit->getReg())) { 795 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Idx); 814 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start); 829 const VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(Start); 830 assert(ParentVNI == Edit->getParent().getVNInfoBefore(End) && 848 LiveInterval *LI = &LIS.getInterval(Edit->get(0)); 878 if (AtBegin || !MBBI->readsVirtualRegister(Edit->getReg())) { 881 forceRecompute(RegIdx, *Edit->getParent().getVNInfoAt(Def)); 949 LiveInterval *LI = &LIS.getInterval(Edit->get(0)); 950 LiveInterval *Parent = &Edit->getParent(); 958 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def); 1004 LiveInterval *LI = &LIS.getInterval(Edit->get(0)); 1005 LiveInterval *Parent = &Edit->getParent(); 1022 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def); 1027 if (Edit->didRematerialize(ParentVNI)) 1103 VNInfo *ParentVNI = Edit->getParent().getVNInfoAt(VNI->def); 1125 for (const LiveRange::Segment &S : Edit->getParent()) { 1149 << printReg(Edit->get(RegIdx)) << ')'); 1150 LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx)); 1249 LiveInterval &PLI = Edit->getParent(); 1266 LiveInterval &ParentLI = Edit->getParent(); 1272 LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx)); 1287 LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx)); 1315 for (MachineRegisterInfo::reg_iterator RI = MRI.reg_begin(Edit->getReg()), 1336 LiveInterval &LI = LIS.getInterval(Edit->get(RegIdx)); 1352 if (!Edit->getParent().liveAt(Idx)) 1372 LiveInterval &LI = LIS.getInterval(Edit->get(EP.RegIdx)); 1397 for (unsigned R : *Edit) { 1409 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){ 1409 for (LiveRangeEdit::iterator I = Edit->begin(), E = Edit->end(); I != E; ++I){ 1432 Edit->eliminateDeadDefs(Dead, None, &AA); 1438 for (unsigned I = 0, E = Edit->size(); I != E; ++I) 1449 const LiveInterval &ParentLI = Edit->getParent(); 1454 for (unsigned I = 0, E = Edit->size(); I != E; ++I) 1477 for (const VNInfo *ParentVNI : Edit->getParent().valnos) { 1485 if (Edit->didRematerialize(ParentVNI)) 1516 for (unsigned Reg : *Edit) { 1525 for (unsigned i = 0, e = Edit->size(); i != e; ++i) 1531 for (unsigned i = 0, e = Edit->size(); i != e; ++i) { 1533 unsigned VReg = Edit->get(i); 1543 LRMap->resize(Edit->size(), i); 1547 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), SA.Loops, MBFI); 1549 assert(!LRMap || LRMap->size() == Edit->size());