reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

include/llvm/CodeGen/TargetSchedule.h

  185   unsigned computeInstrLatency(const MachineInstr *MI,

References

lib/CodeGen/EarlyIfConversion.cpp

  988       unsigned NumCycles = SchedModel.computeInstrLatency(&I, false);
 1002     unsigned NumCycles = SchedModel.computeInstrLatency(&I, false);
 1008     unsigned NumCycles = SchedModel.computeInstrLatency(&I, false);

lib/CodeGen/IfConversion.cpp

 1118       unsigned NumCycles = SchedModel.computeInstrLatency(&MI, false);
 2190     unsigned NumCycles = SchedModel.computeInstrLatency(&I, false);

lib/CodeGen/MachineCombiner.cpp

  242       LatencyOp = TSchedModel.computeInstrLatency(NewRoot);
  283     NewRootLatency += TSchedModel.computeInstrLatency(InsInstrs[i]);
  288     RootLatency += TSchedModel.computeInstrLatency(I);

lib/CodeGen/ScheduleDAGInstrs.cpp

  576     SU->Latency = SchedModel.computeInstrLatency(SU->getInstr());

lib/CodeGen/TargetSchedule.cpp

  307     return computeInstrLatency(DefMI);

lib/Target/AMDGPU/AMDGPUSubtarget.cpp

  866       unsigned Lat = TSchedModel->computeInstrLatency(&MAI) - 1;

lib/Target/AMDGPU/GCNHazardRecognizer.cpp

 1266                                   TSchedModel.computeInstrLatency(MI));
 1343                                   TSchedModel.computeInstrLatency(MI));

lib/Target/X86/X86CmovConversion.cpp

  463         unsigned Latency = TSchedModel.computeInstrLatency(&MI);

lib/Target/X86/X86FixupLEAs.cpp

  289     InstrDistance += TSM.computeInstrLatency(&*CurInst);

lib/Target/X86/X86PadShortFunction.cpp

  191     CyclesToEnd += TSM.computeInstrLatency(&MI);