reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
  393   if (MF.getSubtarget<GCNSubtarget>().isWave32()) {
 1196   if (STM.isWave32())
lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
  326     if (!ST->isWave32()) {
  369     if (!ST->isWave32()) {
  458   if (ST->isWave32()) {
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
 2068     Cond = SDValue(CurDAG->getMachineNode(ST->isWave32() ? AMDGPU::S_AND_B32
 2071                      CurDAG->getRegister(ST->isWave32() ? AMDGPU::EXEC_LO
lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  674   const unsigned WaveAndOpc = Subtarget.isWave32() ?
  676   const unsigned MovTermOpc = Subtarget.isWave32() ?
  678   const unsigned XorTermOpc = Subtarget.isWave32() ?
  680   const unsigned AndSaveExecOpc =  Subtarget.isWave32() ?
  682   const unsigned ExecReg =  Subtarget.isWave32() ?
lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
  142   IntMask = ST.isWave32() ? Type::getInt32Ty(Context)
lib/Target/AMDGPU/SIFrameLowering.cpp
  735       const unsigned OrSaveExec = ST.isWave32() ?
  750     unsigned ExecMov = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;
  751     unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
  895           ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32 : AMDGPU::S_OR_SAVEEXEC_B64;
  908     unsigned ExecMov = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;
  909     unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
lib/Target/AMDGPU/SIISelLowering.cpp
 3211   BuildMI(LoopBB, I, DL, TII->get(ST.isWave32() ? AMDGPU::S_AND_SAVEEXEC_B32
 3248   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
 3250     BuildMI(LoopBB, I, DL, TII->get(ST.isWave32() ? AMDGPU::S_XOR_B32_term
 3289   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
 3290   unsigned MovExecOpc = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;
 3702     bool isWave32 = getSubtarget()->isWave32();
10705   if (ST.isWave32() && !MF.empty()) {
lib/Target/AMDGPU/SIInsertSkips.cpp
  276     unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
  287         BuildMI(MBB, &MI, DL, TII->get(ST.isWave32() ? AMDGPU::S_MOV_B32
  294     if (ST.isWave32())
  347   const bool IsWave32 = ST.isWave32();
lib/Target/AMDGPU/SIInsertWaitcnts.cpp
 1431               TII->get(ST->isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64),
lib/Target/AMDGPU/SIInstrInfo.cpp
  841       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32
  855       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32
  898       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32
  901       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32
  916       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32
  919       BuildMI(MBB, I, DL, get(ST.isWave32() ? AMDGPU::S_CSELECT_B32
 1451     unsigned NotOpc = ST.isWave32() ? AMDGPU::S_NOT_B32 : AMDGPU::S_NOT_B64;
 1452     unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
 1463     unsigned NotOpc = ST.isWave32() ? AMDGPU::S_NOT_B32 : AMDGPU::S_NOT_B64;
 1464     unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
 1533     MI.setDesc(get(ST.isWave32() ? AMDGPU::S_OR_SAVEEXEC_B32
 1540     MI.setDesc(get(ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64));
 4325   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
 4327       ST.isWave32() ? AMDGPU::S_AND_SAVEEXEC_B32 : AMDGPU::S_AND_SAVEEXEC_B64;
 4329       ST.isWave32() ? AMDGPU::S_XOR_B32_term : AMDGPU::S_XOR_B64_term;
 4331       ST.isWave32() ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64;
 4411   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
 4412   unsigned MovExecOpc = ST.isWave32() ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64;
 4949       if (ST.isWave32())
 6247   if (!ST.isWave32())
 6550                    get(ST.isWave32() ? AMDGPU::S_MOV_B32_term
 6560 bool llvm::SIInstrInfo::isWave32() const { return ST.isWave32(); }
lib/Target/AMDGPU/SILowerControlFlow.cpp
  504   if (ST.isWave32()) {
lib/Target/AMDGPU/SILowerI1Copies.cpp
  430   return MRI.createVirtualRegister(ST.isWave32() ? &AMDGPU::SReg_32RegClass
  461   IsWave32 = ST->isWave32();
lib/Target/AMDGPU/SIOptimizeExecMasking.cpp
   68         Src.getReg() == (ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC))
   84         Dst.getReg() == (ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC) &&
  274   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
   87   if (ST.isWave32()) {
   97   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
  110   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
  194   bool Wave32 = ST.isWave32();
  305   unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
lib/Target/AMDGPU/SIRegisterInfo.cpp
   64   isWave32(ST.isWave32()) {
lib/Target/AMDGPU/SIShrinkInstructions.cpp
  556   unsigned VCCReg = ST.isWave32() ? AMDGPU::VCC_LO : AMDGPU::VCC;
lib/Target/AMDGPU/SIWholeQuadMode.cpp
  632     MI = BuildMI(MBB, Before, DebugLoc(), TII->get(ST->isWave32() ?
  637     unsigned Exec = ST->isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
  638     MI = BuildMI(MBB, Before, DebugLoc(), TII->get(ST->isWave32() ?
  653   unsigned Exec = ST->isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
  658     MI = BuildMI(MBB, Before, DebugLoc(), TII->get(ST->isWave32() ?
  685                ST->isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC)
  892   unsigned Exec = ST->isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
  914       BuildMI(Entry, EntryMI, DebugLoc(), TII->get(ST->isWave32() ?