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References

lib/Target/AMDGPU/GCNHazardRecognizer.cpp
  246   if (MI->isBundle())
  249   int WaitStates = std::max(0, checkAnyInstHazards(MI));
  251   if (SIInstrInfo::isSMRD(*MI))
  252     return std::max(WaitStates, checkSMRDHazards(MI));
  254   if (SIInstrInfo::isVMEM(*MI) || SIInstrInfo::isFLAT(*MI))
  254   if (SIInstrInfo::isVMEM(*MI) || SIInstrInfo::isFLAT(*MI))
  255     WaitStates = std::max(WaitStates, checkVMEMHazards(MI));
  258     WaitStates = std::max(WaitStates, checkNSAtoVMEMHazard(MI));
  260   WaitStates = std::max(WaitStates, checkFPAtomicToDenormModeHazard(MI));
  265   if (SIInstrInfo::isVALU(*MI))
  266     WaitStates = std::max(WaitStates, checkVALUHazards(MI));
  268   if (SIInstrInfo::isDPP(*MI))
  269     WaitStates = std::max(WaitStates, checkDPPHazards(MI));
  271   if (isDivFMas(MI->getOpcode()))
  272     WaitStates = std::max(WaitStates, checkDivFMasHazards(MI));
  274   if (isRWLane(MI->getOpcode()))
  275     WaitStates = std::max(WaitStates, checkRWLaneHazards(MI));
  277   if (MI->isInlineAsm())
  278     return std::max(WaitStates, checkInlineAsmHazards(MI));
  280   if (isSGetReg(MI->getOpcode()))
  281     return std::max(WaitStates, checkGetRegHazards(MI));
  283   if (isSSetReg(MI->getOpcode()))
  284     return std::max(WaitStates, checkSetRegHazards(MI));
  286   if (isRFE(MI->getOpcode()))
  287     return std::max(WaitStates, checkRFEHazards(MI));
  289   if (ST.hasReadM0MovRelInterpHazard() && (TII.isVINTRP(*MI) ||
  290                                            isSMovRel(MI->getOpcode())))
  291     return std::max(WaitStates, checkReadM0Hazards(MI));
  293   if (ST.hasReadM0SendMsgHazard() && isSendMsgTraceDataOrGDS(TII, *MI))
  294     return std::max(WaitStates, checkReadM0Hazards(MI));
  296   if (SIInstrInfo::isMAI(*MI))
  297     return std::max(WaitStates, checkMAIHazards(MI));
  299   if (MI->mayLoad() || MI->mayStore())
  299   if (MI->mayLoad() || MI->mayStore())
  300     return std::max(WaitStates, checkMAILdStHazards(MI));