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References

lib/Target/AMDGPU/SIMachineScheduler.cpp
 1644     TryCand.Block = *I;
 1645     TryCand.IsHighLatency = TryCand.Block->isHighLatencyBlock();
 1645     TryCand.IsHighLatency = TryCand.Block->isHighLatencyBlock();
 1646     TryCand.VGPRUsageDiff =
 1647       checkRegUsageImpact(TryCand.Block->getInRegs(),
 1648                           TryCand.Block->getOutRegs())[DAG->getVGPRSetID()];
 1649     TryCand.NumSuccessors = TryCand.Block->getSuccs().size();
 1649     TryCand.NumSuccessors = TryCand.Block->getSuccs().size();
 1650     TryCand.NumHighLatencySuccessors =
 1651       TryCand.Block->getNumHighLatencySuccessors();
 1652     TryCand.LastPosHighLatParentScheduled =
 1654          LastPosHighLatencyParentScheduled[TryCand.Block->getID()] -
 1656     TryCand.Height = TryCand.Block->Height;
 1656     TryCand.Height = TryCand.Block->Height;
 1660       if (!tryCandidateRegUsage(Cand, TryCand) &&
 1662         tryCandidateLatency(Cand, TryCand);
 1664       if (!tryCandidateLatency(Cand, TryCand))
 1665         tryCandidateRegUsage(Cand, TryCand);
 1667     if (TryCand.Reason != NoCand) {
 1668       Cand.setBest(TryCand);