reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

lib/Target/ARM/ARMBaseInstrInfo.cpp

  604   bool SimpleScaled = (isAdd && ShiftOpc == ARM_AM::lsl && Amt == 2);
 3352           ARM_AM::getAM2ShiftOpc(ShOpVal) == ARM_AM::lsl)))
 3368           ARM_AM::getAM2ShiftOpc(ShOpVal) == ARM_AM::lsl)))
 3396           ARM_AM::getAM2ShiftOpc(ShOpVal) == ARM_AM::lsl)))
 3409           ARM_AM::getAM2ShiftOpc(ShOpVal) == ARM_AM::lsl)))
 3460           ARM_AM::getAM2ShiftOpc(ShOpVal) == ARM_AM::lsl)))
 4089           (ShImm == 2 && ARM_AM::getAM2ShiftOpc(ShOpVal) == ARM_AM::lsl))
 4117             ARM_AM::getAM2ShiftOpc(ShOpVal) == ARM_AM::lsl)))
 4394           (ShImm == 2 && ARM_AM::getAM2ShiftOpc(ShOpVal) == ARM_AM::lsl))
 4422            ARM_AM::getAM2ShiftOpc(ShOpVal) == ARM_AM::lsl))
 5243        ARM_AM::getSORegShOp(ShOpVal) == ARM_AM::lsl))

lib/Target/ARM/ARMFastISel.cpp

 2718     ARM_AM::ShiftOpc ShiftAM = isLsl ? ARM_AM::lsl : Shift;
 2878       return SelectShift(I, ARM_AM::lsl);

lib/Target/ARM/ARMFrameLowering.cpp

  325           .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, NrBitsToZero))

lib/Target/ARM/ARMISelDAGToDAG.cpp

  482   return ShOpcVal == ARM_AM::lsl &&
  543           ARM_AM::getSORegOpc(ARM_AM::lsl, PowerOfTwo), Loc, MVT::i32);
  671                                                             ARM_AM::lsl),
  752       ShOpcVal = ARM_AM::lsl;
 1391   if (ShOpcVal != ARM_AM::lsl) {
 1393     if (ShOpcVal == ARM_AM::lsl)
 1397   if (ShOpcVal == ARM_AM::lsl) {
 3074         ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm);
 3093         ShImm = ARM_AM::getSORegOpc(ARM_AM::lsl, ShImm);

lib/Target/ARM/ARMISelLowering.cpp

 9619         .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2))
 9772         .addImm(ARM_AM::getSORegOpc(ARM_AM::lsl, 2))

lib/Target/ARM/ARMInstructionSelector.cpp

 1062     return selectShift(ARM_AM::ShiftOpc::lsl, MIB);

lib/Target/ARM/ARMSelectionDAGInfo.h

   26     case ISD::SHL:    return ARM_AM::lsl;

lib/Target/ARM/AsmParser/ARMAsmParser.cpp

 1607         Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm != 1 ||
 1626     if (Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm > 3)
 3957       .Case("asl", ARM_AM::lsl)
 3958       .Case("lsl", ARM_AM::lsl)
 4009           ((ShiftTy == ARM_AM::lsl || ShiftTy == ARM_AM::ror) && Imm > 31) ||
 4017         ShiftTy = ARM_AM::lsl;
 5847     St = ARM_AM::lsl;
 5884         ((St == ARM_AM::lsl || St == ARM_AM::ror) && Imm > 31) ||
 5889       St = ARM_AM::lsl;
 9544     case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLrr : ARM::t2LSLrr; break;
 9579     if (Shift == ARM_AM::lsl && Amount == 0) {
 9594       case ARM_AM::lsl: newOpc = isNarrow ? ARM::tLSLri : ARM::t2LSLri; break;
 9626     case ARM::LSLr: ShiftTy = ARM_AM::lsl; break;
 9651     case ARM::LSLi: ShiftTy = ARM_AM::lsl; break;

lib/Target/ARM/Disassembler/ARMDisassembler.cpp

 1450   ARM_AM::ShiftOpc Shift = ARM_AM::lsl;
 1453       Shift = ARM_AM::lsl;
 1489   ARM_AM::ShiftOpc Shift = ARM_AM::lsl;
 1492       Shift = ARM_AM::lsl;
 1882     ARM_AM::ShiftOpc Opc = ARM_AM::lsl;
 1885         Opc = ARM_AM::lsl;
 1907     unsigned tmp = ARM_AM::getAM2Opc(Op, imm, ARM_AM::lsl, idx_mode);
 1927   ARM_AM::ShiftOpc ShOp = ARM_AM::lsl;
 1930       ShOp = ARM_AM::lsl;

lib/Target/ARM/MCTargetDesc/ARMAddressingModes.h

   48     case ARM_AM::lsl: return "lsl";
   60     case ARM_AM::lsl: return 0;

lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp

   54   if (ShOpc == ARM_AM::no_shift || (ShOpc == ARM_AM::lsl && !ShImm))

lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp

  249     case ARM_AM::lsl: return 0;
 1529     case ARM_AM::lsl: SBits = 0x1; break;
 1574   case ARM_AM::lsl: SBits = 0x0; break;
 1681   case ARM_AM::lsl: SBits = 0x0; break;