reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
109 OS << printv(BV.RefI.Reg) << '[' << BV.RefI.Pos << ']'; 109 OS << printv(BV.RefI.Reg) << '[' << BV.RefI.Pos << ']'; 133 if (IsRef && SV.Type == BT::BitValue::Ref && V.RefI.Reg == SV.RefI.Reg) { 133 if (IsRef && SV.Type == BT::BitValue::Ref && V.RefI.Reg == SV.RefI.Reg) { 135 SeqRef = (V.RefI.Pos == SV.RefI.Pos+1); 135 SeqRef = (V.RefI.Pos == SV.RefI.Pos+1); 136 ConstRef = (V.RefI.Pos == SV.RefI.Pos); 136 ConstRef = (V.RefI.Pos == SV.RefI.Pos); 138 if (SeqRef && V.RefI.Pos == SV.RefI.Pos+(i-Start)) 138 if (SeqRef && V.RefI.Pos == SV.RefI.Pos+(i-Start)) 140 if (ConstRef && V.RefI.Pos == SV.RefI.Pos) 140 if (ConstRef && V.RefI.Pos == SV.RefI.Pos) 153 OS << printv(SV.RefI.Reg) << '[' << SV.RefI.Pos << '-' 153 OS << printv(SV.RefI.Reg) << '[' << SV.RefI.Pos << '-' 154 << SV.RefI.Pos+(Count-1) << ']'; 170 OS << printv(SV.RefI.Reg) << '[' << SV.RefI.Pos << '-' 170 OS << printv(SV.RefI.Reg) << '[' << SV.RefI.Pos << '-' 171 << SV.RefI.Pos+(Count-1) << ']'; 323 if (V.Type == BitValue::Ref && V.RefI.Reg == 0) 324 Bits[i].RefI = BitRef(R, i); 903 if (V.Type == BitValue::Ref && V.RefI.Reg == RD.Reg) 1012 if (V.Type != BitValue::Ref || V.RefI.Reg != OldRR.Reg) 1014 if (V.RefI.Pos < OMB || V.RefI.Pos > OME) 1014 if (V.RefI.Pos < OMB || V.RefI.Pos > OME) 1016 V.RefI.Reg = NewRR.Reg; 1017 V.RefI.Pos += NMB-OMB;lib/Target/Hexagon/BitTracker.h
200 if (Type == Ref && !(RefI == V.RefI)) 200 if (Type == Ref && !(RefI == V.RefI)) 230 if (Type == Ref && RefI == Self) // Bottom.meet(V) = Bottom (i.e. This) 242 RefI = V.RefI; // This may be irrelevant, but copy anyway. 242 RefI = V.RefI; // This may be irrelevant, but copy anyway. 247 RefI = Self; 273 if (V.RefI.Reg != 0) 274 return BitValue(V.RefI.Reg, V.RefI.Pos); 274 return BitValue(V.RefI.Reg, V.RefI.Pos);lib/Target/Hexagon/HexagonBitSimplify.cpp
318 if (RC1[B1+i].Type == BitTracker::BitValue::Ref && RC1[B1+i].RefI.Reg == 0) 321 if (RC2[B2+i].Type == BitTracker::BitValue::Ref && RC2[B2+i].RefI.Reg == 0) 1811 unsigned Reg = RC[I].RefI.Reg; 1812 unsigned P = RC[I].RefI.Pos; // The RefI.Pos will be advanced by I-B. 1831 if (RV.RefI.Reg != Reg) 1833 if (RV.RefI.Pos != i+Pos) 2209 unsigned SrcR = B0.RefI.Reg; 2211 unsigned Pos = B0.RefI.Pos; 2218 if (V.RefI.Reg != SrcR || V.RefI.Pos != Pos+i) 2218 if (V.RefI.Reg != SrcR || V.RefI.Pos != Pos+i) 2237 if (S0.Type != BitTracker::BitValue::Ref || S0.RefI.Reg != SrcR) 2239 unsigned P = S0.RefI.Pos; 2254 if (V.RefI.Reg != SrcR || V.RefI.Pos != P+I) 2254 if (V.RefI.Reg != SrcR || V.RefI.Pos != P+I) 2341 if (V.Type == BitTracker::BitValue::Ref && V.RefI.Reg != RS.Reg) { 2342 const TargetRegisterClass *TC = MRI.getRegClass(V.RefI.Reg); 2347 BitTracker::RegisterRef RR(V.RefI.Reg, 0); 2349 P = V.RefI.Pos; 2356 P = V.RefI.Pos; 2425 if (V.Type == BitTracker::BitValue::Ref && V.RefI.Reg == RD.Reg) 2444 if (TopV.RefI.Reg == RD.Reg || TopV.RefI.Pos == W-1) 2444 if (TopV.RefI.Reg == RD.Reg || TopV.RefI.Pos == W-1) 3028 if (V.RefI.Reg != InpR) 3050 if (V1.RefI.Pos != V2.RefI.Pos) 3050 if (V1.RefI.Pos != V2.RefI.Pos) 3052 if (V1.RefI.Reg != InpR1) 3054 if (V2.RefI.Reg == 0 || V2.RefI.Reg == OutR2) 3054 if (V2.RefI.Reg == 0 || V2.RefI.Reg == OutR2) 3057 MatchR = V2.RefI.Reg; 3058 else if (V2.RefI.Reg != MatchR)lib/Target/Hexagon/HexagonGenInsert.cpp
253 unsigned Ind1 = BaseOrd[V1.RefI.Reg], Ind2 = BaseOrd[V2.RefI.Reg]; 253 unsigned Ind1 = BaseOrd[V1.RefI.Reg], Ind2 = BaseOrd[V2.RefI.Reg]; 257 assert(V1.RefI.Pos != V2.RefI.Pos && "Bit values should be different"); 257 assert(V1.RefI.Pos != V2.RefI.Pos && "Bit values should be different"); 258 return V1.RefI.Pos < V2.RefI.Pos; 258 return V1.RefI.Pos < V2.RefI.Pos; 705 if (V.Type == BitTracker::BitValue::Ref && V.RefI.Reg == VR) 715 if (V.Type == BitTracker::BitValue::Ref && V.RefI.Reg != VR)