reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

Declarations

lib/Target/Mips/MipsTargetStreamer.h

  129   void emitRRX(unsigned Opcode, unsigned Reg0, unsigned Reg1, MCOperand Op2,

References

lib/Target/Mips/AsmParser/MipsAsmParser.cpp

 2872         TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, DstReg, DstReg,
 2877         TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, DstReg, GPReg,
 2917       TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, TmpReg, TmpReg,
 2921         TOut.emitRRX(IsPtr64 ? Mips::DADDiu : Mips::ADDiu, TmpReg, TmpReg,
 2984     TOut.emitRRX(IsPtr64 ? Mips::LD : Mips::LW, TmpReg, GPReg,
 2988       TOut.emitRRX(IsPtr64 ? Mips::DADDiu : Mips::ADDiu, TmpReg, TmpReg,
 3033       TOut.emitRRX(Mips::DADDiu, ATReg, ATReg,
 3036       TOut.emitRRX(Mips::DADDiu, ATReg, ATReg, MCOperand::createExpr(HiExpr),
 3039       TOut.emitRRX(Mips::DADDiu, ATReg, ATReg, MCOperand::createExpr(LoExpr),
 3061       TOut.emitRRX(Mips::DADDiu, DstReg, DstReg,
 3063       TOut.emitRRX(Mips::DADDiu, ATReg, ATReg, MCOperand::createExpr(LoExpr),
 3082       TOut.emitRRX(Mips::DADDiu, DstReg, DstReg,
 3085       TOut.emitRRX(Mips::DADDiu, DstReg, DstReg,
 3088       TOut.emitRRX(Mips::DADDiu, DstReg, DstReg,
 3126   TOut.emitRRX(Mips::ADDiu, TmpReg, TmpReg, MCOperand::createExpr(LoExpr),
 3216       TOut.emitRRX(Mips::LW, ATReg, GPReg, MCOperand::createExpr(GotExpr),
 3219       TOut.emitRRX(Mips::LD, ATReg, GPReg, MCOperand::createExpr(GotExpr),
 3248       TOut.emitRRX(Mips::DADDiu, ATReg, ATReg,
 3251       TOut.emitRRX(Mips::DADDiu, ATReg, ATReg, MCOperand::createExpr(HiExpr),
 3342   TOut.emitRRX(Mips::LWC1, FirstReg, TmpReg, MCOperand::createExpr(LoExpr),
 3400   TOut.emitRRX(isABI_N64() ? Mips::DADDiu : Mips::ADDiu, TmpReg, TmpReg,
 3479   TOut.emitRRX(Is64FPU ? Mips::LDC164 : Mips::LDC1, FirstReg, TmpReg,
 3569       TOut.emitRRX(OpCode, DstRegOp.getReg(), Mips::ZERO,
 3573       TOut.emitRRX(OpCode, DstRegOp.getReg(), Mips::ZERO, MemOffsetOp, IDLoc,
 3587       TOut.emitRRX(OpCode, DstRegOp.getReg(), ATReg,
 3591       TOut.emitRRX(OpCode, DstRegOp.getReg(), ATReg, MemOffsetOp, IDLoc, STI);
 3707       TOut.emitRRX(Inst.getOpcode(), DstReg, TmpReg, LoOperand, IDLoc, STI);
 3908       TOut.emitRRX(Mips::BNE, Mips::ZERO, Mips::ZERO,
 3915       TOut.emitRRX(Mips::BEQ, Mips::ZERO, Mips::ZERO,
 3940       TOut.emitRRX(Mips::BEQ, Mips::ZERO, Mips::ZERO,
 3958       TOut.emitRRX(AcceptsEquality ? Mips::BEQ : Mips::BNE,
 4000   TOut.emitRRX(IsLikely ? (AcceptsEquality ? Mips::BEQL : Mips::BNEL)
 4132     TOut.emitRRX(Mips::BNE, RtReg, ZeroReg, LabelOp, IDLoc, STI);
 4163   TOut.emitRRX(Mips::BNE, RtReg, ATReg, LabelOpEnd, IDLoc, STI);
 4176     TOut.emitRRX(Mips::BNE, RsReg, ATReg, LabelOpEnd, IDLoc, STI);
 4978     TOut.emitRRX(Mips::BEQ, DstReg, ATReg, LabelOp, IDLoc, STI);
 5015     TOut.emitRRX(Mips::BEQ, ATReg, Mips::ZERO, LabelOp, IDLoc, STI);
 5076     TOut.emitRRX(Opcode, FirstReg, BaseReg, FirstOffset, IDLoc, STI);
 5077     TOut.emitRRX(Opcode, SecondReg, BaseReg, SecondOffset, IDLoc, STI);
 5079     TOut.emitRRX(Opcode, SecondReg, BaseReg, SecondOffset, IDLoc, STI);
 5080     TOut.emitRRX(Opcode, FirstReg, BaseReg, FirstOffset, IDLoc, STI);
 5123   TOut.emitRRX(Opcode, FirstReg, BaseReg, FirstOffset, IDLoc, STI);
 5124   TOut.emitRRX(Opcode, SecondReg, BaseReg, SecondOffset, IDLoc, STI);

lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp

  225   emitRRX(Opcode, Reg0, Reg1, MCOperand::createReg(Reg2), IDLoc, STI);
  244   emitRRX(Opcode, Reg0, Reg1, MCOperand::createImm(Imm), IDLoc, STI);
  353     emitRRX(Mips::ADDiu, ATReg, ATReg, LoOperand, IDLoc, STI);
 1264     emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(),
 1281   emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(),