reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
4350 SDLoc dl(N); 4351 if (N->isMachineOpcode()) { 4352 N->setNodeId(-1); 4359 if (N->getOpcode() == ISD::ADD && 4360 N->getOperand(1).getOpcode() == ISD::TargetConstant) 4364 if (tryBitPermutation(N)) 4368 if (tryIntCompareInGPR(N)) 4371 switch (N->getOpcode()) { 4375 if (N->getValueType(0) == MVT::i64) { 4376 ReplaceNode(N, selectI64Imm(CurDAG, N)); 4376 ReplaceNode(N, selectI64Imm(CurDAG, N)); 4382 if (trySETCC(N)) 4404 SDValue Op = N->getOperand(1); 4418 ReplaceNode(N, getGlobalBaseReg()); 4422 selectFrameIndex(N, N); 4422 selectFrameIndex(N, N); 4426 SDValue InFlag = N->getOperand(1); 4427 ReplaceNode(N, CurDAG->getMachineNode(PPC::MFOCRF, dl, MVT::i32, 4428 N->getOperand(0), InFlag)); 4433 ReplaceNode(N, CurDAG->getMachineNode(PPC::ReadTB, dl, MVT::i32, MVT::i32, 4434 MVT::Other, N->getOperand(0))); 4438 SDValue N0 = N->getOperand(0); 4440 CurDAG->getTargetConstant(*cast<ConstantSDNode>(N->getOperand(1))-> 4442 N->getValueType(0)); 4443 if (N->getValueType(0) == MVT::i64) { 4447 CurDAG->SelectNodeTo(N, PPC::ADDZE8, MVT::i64, SDValue(Op, 0), 4451 assert(N->getValueType(0) == MVT::i32 && 4456 CurDAG->SelectNodeTo(N, PPC::ADDZE, MVT::i32, SDValue(Op, 0), 4464 StoreSDNode *ST = cast<StoreSDNode>(N); 4473 LoadSDNode *LD = cast<LoadSDNode>(N); 4522 transferMemOperands(N, MN); 4523 ReplaceNode(N, MN); 4562 transferMemOperands(N, MN); 4563 ReplaceNode(N, MN); 4574 if (isInt32Immediate(N->getOperand(1), Imm) && 4575 isRotateAndMask(N->getOperand(0).getNode(), Imm, false, SH, MB, ME)) { 4576 SDValue Val = N->getOperand(0).getOperand(0); 4579 CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops); 4584 if (isInt32Immediate(N->getOperand(1), Imm) && 4586 N->getOperand(0).getOpcode() != ISD::ROTL) { 4587 SDValue Val = N->getOperand(0); 4590 CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops); 4594 if (isInt64Immediate(N->getOperand(1).getNode(), Imm64) && 4596 SDValue Val = N->getOperand(0); 4630 CurDAG->SelectNodeTo(N, PPC::RLDICL, MVT::i64, Ops); 4636 if (isInt64Immediate(N->getOperand(1).getNode(), Imm64) && 4638 SDValue Val = N->getOperand(0); 4642 CurDAG->SelectNodeTo(N, PPC::RLDICR, MVT::i64, Ops); 4647 if (isInt32Immediate(N->getOperand(1), Imm) && (Imm == 0)) { 4648 ReplaceUses(SDValue(N, 0), N->getOperand(1)); 4648 ReplaceUses(SDValue(N, 0), N->getOperand(1)); 4654 if (isInt32Immediate(N->getOperand(1), Imm) && 4655 N->getOperand(0).getOpcode() == ISD::OR && 4656 isInt32Immediate(N->getOperand(0).getOperand(1), Imm2)) { 4671 SDValue Ops[] = { N->getOperand(0).getOperand(0), 4672 N->getOperand(0).getOperand(1), 4675 ReplaceNode(N, CurDAG->getMachineNode(PPC::RLWIMI, dl, MVT::i32, Ops)); 4684 if (N->getValueType(0) == MVT::i32) 4685 if (tryBitfieldInsert(N)) 4689 if (N->getOperand(0)->getOpcode() == ISD::FrameIndex && 4690 isIntS16Immediate(N->getOperand(1), Imm)) { 4691 KnownBits LHSKnown = CurDAG->computeKnownBits(N->getOperand(0)); 4696 selectFrameIndex(N, N->getOperand(0).getNode(), (int)Imm); 4696 selectFrameIndex(N, N->getOperand(0).getNode(), (int)Imm); 4705 if (IsPPC64 && isInt64Immediate(N->getOperand(1), Imm64) && 4712 N->getOperand(0), 4715 CurDAG->SelectNodeTo(N, PPC::ORIS8, MVT::i64, Ops1); 4728 if (IsPPC64 && isInt64Immediate(N->getOperand(1), Imm64) && 4735 N->getOperand(0), 4738 CurDAG->SelectNodeTo(N, PPC::XORIS8, MVT::i64, Ops1); 4747 if (N->getOperand(0)->getOpcode() == ISD::FrameIndex && 4748 isIntS16Immediate(N->getOperand(1), Imm)) { 4749 selectFrameIndex(N, N->getOperand(0).getNode(), (int)Imm); 4749 selectFrameIndex(N, N->getOperand(0).getNode(), (int)Imm); 4757 if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, Imm) && 4758 isRotateAndMask(N, Imm, true, SH, MB, ME)) { 4759 SDValue Ops[] = { N->getOperand(0).getOperand(0), 4762 CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops); 4771 if (isOpcWithIntImmediate(N->getOperand(0).getNode(), ISD::AND, Imm) && 4772 isRotateAndMask(N, Imm, true, SH, MB, ME)) { 4773 SDValue Ops[] = { N->getOperand(0).getOperand(0), 4776 CurDAG->SelectNodeTo(N, PPC::RLWINM, MVT::i32, Ops); 4789 EVT InVT = N->getOperand(0).getValueType(); 4795 N->getOperand(0), 4800 CurDAG->getTargetConstant(N->getOpcode() == PPCISD::ANDIo_1_EQ_BIT ? 4803 CurDAG->SelectNodeTo(N, TargetOpcode::EXTRACT_SUBREG, MVT::i1, CR0Reg, 4808 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get(); 4815 N->getOperand(0).getValueType() == MVT::i1) 4821 if (mayUseP9Setb(N, CC, CurDAG, NeedSwapOps, IsUnCmp)) { 4822 SDValue LHS = N->getOperand(0); 4823 SDValue RHS = N->getOperand(1); 4836 N, N->getSimpleValueType(0) == MVT::i64 ? PPC::SETB8 : PPC::SETB, 4836 N, N->getSimpleValueType(0) == MVT::i64 ? PPC::SETB8 : PPC::SETB, 4837 N->getValueType(0), GenCC); 4845 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N->getOperand(1))) 4846 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N->getOperand(2))) 4847 if (ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N->getOperand(3))) 4851 N->getValueType(0) == MVT::i32) { 4854 N->getOperand(0), getI32Imm(~0U, dl)); 4855 CurDAG->SelectNodeTo(N, PPC::SUBFE, MVT::i32, SDValue(Tmp, 0), 4856 N->getOperand(0), SDValue(Tmp, 1)); 4860 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl); 4860 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl); 4862 if (N->getValueType(0) == MVT::i1) { 4884 C, N->getOperand(2)), 0); 4886 NotC, N->getOperand(3)), 0); 4888 CurDAG->SelectNodeTo(N, PPC::CROR, MVT::i1, CAndT, NotCAndF); 4895 if (N->getValueType(0) == MVT::i32) 4897 else if (N->getValueType(0) == MVT::i64) 4899 else if (N->getValueType(0) == MVT::f32) { 4906 } else if (N->getValueType(0) == MVT::f64) { 4913 } else if (N->getValueType(0) == MVT::f128) 4917 else if (PPCSubTarget->hasQPX() && N->getValueType(0) == MVT::v4f64) 4919 else if (PPCSubTarget->hasQPX() && N->getValueType(0) == MVT::v4f32) 4921 else if (PPCSubTarget->hasQPX() && N->getValueType(0) == MVT::v4i1) 4923 else if (N->getValueType(0) == MVT::v2f64 || 4924 N->getValueType(0) == MVT::v2i64) 4929 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3), 4929 SDValue Ops[] = { CCReg, N->getOperand(2), N->getOperand(3), 4931 CurDAG->SelectNodeTo(N, SelectCCOp, N->getValueType(0), Ops); 4931 CurDAG->SelectNodeTo(N, SelectCCOp, N->getValueType(0), Ops); 4935 if (PPCSubTarget->hasVSX() && (N->getValueType(0) == MVT::v2f64 || 4936 N->getValueType(0) == MVT::v2i64)) { 4937 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N); 4939 SDValue Op1 = N->getOperand(SVN->getMaskElt(0) < 2 ? 0 : 1), 4940 Op2 = N->getOperand(SVN->getMaskElt(1) < 2 ? 0 : 1); 4962 SDNode *NewN = CurDAG->SelectNodeTo(N, PPC::LXVDSX, 4963 N->getValueType(0), Ops); 4981 CurDAG->SelectNodeTo(N, PPC::XXPERMDI, N->getValueType(0), Ops); 4981 CurDAG->SelectNodeTo(N, PPC::XXPERMDI, N->getValueType(0), Ops); 4989 SDValue Ops[] = { N->getOperand(1), N->getOperand(0) }; 4989 SDValue Ops[] = { N->getOperand(1), N->getOperand(0) }; 4990 CurDAG->SelectNodeTo(N, N->getOpcode() == PPCISD::BDNZ 4990 CurDAG->SelectNodeTo(N, N->getOpcode() == PPCISD::BDNZ 5003 unsigned PCC = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue(); 5005 PCC |= getBranchHint(PCC, FuncInfo, N->getOperand(3)); 5008 SDValue Ops[] = { Pred, N->getOperand(2), N->getOperand(3), 5008 SDValue Ops[] = { Pred, N->getOperand(2), N->getOperand(3), 5009 N->getOperand(0), N->getOperand(4) }; 5009 N->getOperand(0), N->getOperand(4) }; 5010 CurDAG->SelectNodeTo(N, PPC::BCC, MVT::Other, Ops); 5014 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get(); 5017 if (N->getOperand(2).getValueType() == MVT::i1) { 5040 N->getOperand(Swap ? 3 : 2), 5041 N->getOperand(Swap ? 2 : 3)), 0); 5042 CurDAG->SelectNodeTo(N, PPC::BC, MVT::Other, BitComp, N->getOperand(4), 5042 CurDAG->SelectNodeTo(N, PPC::BC, MVT::Other, BitComp, N->getOperand(4), 5043 N->getOperand(0)); 5048 PCC |= getBranchHint(PCC, FuncInfo, N->getOperand(4)); 5050 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl); 5050 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl); 5052 N->getOperand(4), N->getOperand(0) }; 5052 N->getOperand(4), N->getOperand(0) }; 5053 CurDAG->SelectNodeTo(N, PPC::BCC, MVT::Other, Ops); 5058 SDValue Chain = N->getOperand(0); 5059 SDValue Target = N->getOperand(1); 5064 CurDAG->SelectNodeTo(N, Reg, MVT::Other, Chain); 5104 replaceWithLWZtoc(N); 5109 replaceWithLWZtoc(N); 5130 SDValue GA = N->getOperand(0); 5131 SDValue TOCbase = N->getOperand(1); 5143 transferMemOperands(N, MN); 5144 ReplaceNode(N, MN); 5149 ReplaceNode(N, CurDAG->getMachineNode(PPC::ADDItocL, dl, MVT::i64, 5157 CurDAG->SelectNodeTo(N, PPC::PPC32PICGOT, 5165 assert(isa<ConstantSDNode>(N->getOperand(0)) && 5166 isa<ConstantSDNode>(N->getOperand(1)) && 5169 int Elt = N->getConstantOperandVal(0); 5170 int EltSize = N->getConstantOperandVal(1); 5202 ReplaceNode(N, CurDAG->getMachineNode(Opc2, dl, VT, TmpVal, TmpVal)); 5215 ReplaceNode(N, CurDAG->getMachineNode(Opc3, dl, VT, SDValue(Tmp1, 0), 5229 ReplaceNode(N, CurDAG->getMachineNode(Opc2, dl, VT, SDValue(Tmp1, 0), 5236 SelectCode(N);