reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
1440 if (MI.isCall()) { 1445 if (MI.isReturn()) { 1450 switch (MI.getOpcode()) { 1454 const MachineOperand &MO1 = MI.getOperand(1); 1455 const MachineOperand &MO0 = MI.getOperand(0); 1456 bool KillsSrc = MI.killsRegister(MO1.getReg()); 1478 unsigned Reg = MI.getOperand(0).getReg() - X86::FP0; 1480 BuildMI(*MBB, Inst, MI.getDebugLoc(), TII->get(X86::LD_F0)); 1525 for (unsigned i = InlineAsm::MIOp_FirstOperand, e = MI.getNumOperands(); 1526 i != e && MI.getOperand(i).isImm(); i += 1 + NumOps) { 1527 unsigned Flags = MI.getOperand(i).getImm(); 1532 const MachineOperand &MO = MI.getOperand(i + 1); 1565 MI.emitError("fixed input regs must be last on the x87 stack"); 1570 MI.emitError("output regs must be last on the x87 stack"); 1577 MI.emitError("clobbers must be last on the x87 stack"); 1582 MI.emitError("implicitly popped regs must be last on the x87 stack"); 1592 for (unsigned I = 0, E = MI.getNumOperands(); I < E; ++I) 1594 assert((1 << getFPReg(MI.getOperand(I)) & STDefs) == 0 && 1602 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 1603 MachineOperand &Op = MI.getOperand(i); 1631 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 1632 MachineOperand &Op = MI.getOperand(i);