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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/Target/X86/X86ISelLowering.cpp 9307 createVariablePermute(VT, SrcVec, IndicesVec, DL, DAG, Subtarget), 0,
9308 DAG, DL, SizeInBits);
9370 IndicesVec = DAG.getNode(ISD::ADD, DL, IndicesVT, IndicesVec, IndicesVec);
9376 DL, IndicesVec,
9377 getZeroVector(IndicesVT.getSimpleVT(), Subtarget, DAG, DL),
9378 DAG.getVectorShuffle(VT, DL, SrcVec, SrcVec, {0, 0}),
9379 DAG.getVectorShuffle(VT, DL, SrcVec, SrcVec, {1, 1}),
9387 SDValue LoSrc = extract128BitVector(SrcVec, 0, DAG, DL);
9388 SDValue HiSrc = extract128BitVector(SrcVec, 16, DAG, DL);
9389 SDValue LoIdx = extract128BitVector(IndicesVec, 0, DAG, DL);
9390 SDValue HiIdx = extract128BitVector(IndicesVec, 16, DAG, DL);
9392 ISD::CONCAT_VECTORS, DL, VT,
9393 DAG.getNode(X86ISD::VPPERM, DL, MVT::v16i8, LoSrc, HiSrc, LoIdx),
9394 DAG.getNode(X86ISD::VPPERM, DL, MVT::v16i8, LoSrc, HiSrc, HiIdx));
9396 SDValue Lo = extract128BitVector(SrcVec, 0, DAG, DL);
9397 SDValue Hi = extract128BitVector(SrcVec, 16, DAG, DL);
9398 SDValue LoLo = DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Lo, Lo);
9399 SDValue HiHi = DAG.getNode(ISD::CONCAT_VECTORS, DL, VT, Hi, Hi);
9413 return SplitOpsAndApply(DAG, Subtarget, DL, MVT::v32i8, Ops,
9426 DAG.getBitcast(MVT::v32i8, IndicesVec), DL, DAG, Subtarget));
9435 SDValue LoLo = DAG.getVectorShuffle(MVT::v8f32, DL, SrcVec, SrcVec,
9437 SDValue HiHi = DAG.getVectorShuffle(MVT::v8f32, DL, SrcVec, SrcVec,
9441 VT, DAG.getNode(X86ISD::VPERMIL2, DL, MVT::v8f32, LoLo, HiHi,
9442 IndicesVec, DAG.getTargetConstant(0, DL, MVT::i8)));
9446 DL, IndicesVec, DAG.getConstant(3, DL, MVT::v8i32),
9446 DL, IndicesVec, DAG.getConstant(3, DL, MVT::v8i32),
9447 DAG.getNode(X86ISD::VPERMILPV, DL, MVT::v8f32, HiHi, IndicesVec),
9448 DAG.getNode(X86ISD::VPERMILPV, DL, MVT::v8f32, LoLo, IndicesVec),
9462 SDValue Res = createVariablePermute(WidenSrcVT, SrcVec, IndicesVec, DL,
9464 return extract256BitVector(Res, 0, DAG, DL);
9470 DAG.getVectorShuffle(MVT::v4f64, DL, SrcVec, SrcVec, {0, 1, 0, 1});
9472 DAG.getVectorShuffle(MVT::v4f64, DL, SrcVec, SrcVec, {2, 3, 2, 3});
9474 IndicesVec = DAG.getNode(ISD::ADD, DL, IndicesVT, IndicesVec, IndicesVec);
9477 VT, DAG.getNode(X86ISD::VPERMIL2, DL, MVT::v4f64, LoLo, HiHi,
9478 IndicesVec, DAG.getTargetConstant(0, DL, MVT::i8)));
9482 DL, IndicesVec, DAG.getConstant(2, DL, MVT::v4i64),
9482 DL, IndicesVec, DAG.getConstant(2, DL, MVT::v4i64),
9483 DAG.getNode(X86ISD::VPERMILPV, DL, MVT::v4f64, HiHi, IndicesVec),
9484 DAG.getNode(X86ISD::VPERMILPV, DL, MVT::v4f64, LoLo, IndicesVec),
9521 ? DAG.getNode(Opcode, DL, ShuffleVT, IndicesVec, SrcVec)
9522 : DAG.getNode(Opcode, DL, ShuffleVT, SrcVec, IndicesVec);