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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
lib/Target/X86/X86ISelLowering.cpp25196 SDValue Odd0 = DAG.getVectorShuffle(VT, dl, A, A,
25199 SDValue Odd1 = DAG.getVectorShuffle(VT, dl, B, B,
25209 SDValue Mul1 = DAG.getBitcast(VT, DAG.getNode(Opcode, dl, MulVT,
25214 SDValue Mul2 = DAG.getBitcast(VT, DAG.getNode(Opcode, dl, MulVT,
25223 SDValue Res = DAG.getVectorShuffle(VT, dl, Mul1, Mul2, ShufMask);
25228 SDValue Zero = DAG.getConstant(0, dl, VT);
25229 SDValue T1 = DAG.getNode(ISD::AND, dl, VT,
25230 DAG.getSetCC(dl, VT, Zero, A, ISD::SETGT), B);
25231 SDValue T2 = DAG.getNode(ISD::AND, dl, VT,
25232 DAG.getSetCC(dl, VT, Zero, B, ISD::SETGT), A);
25234 SDValue Fixup = DAG.getNode(ISD::ADD, dl, VT, T1, T2);
25235 Res = DAG.getNode(ISD::SUB, dl, VT, Res, Fixup);
25256 SDValue ExA = DAG.getNode(ExAVX, dl, ExVT, A);
25257 SDValue ExB = DAG.getNode(ExAVX, dl, ExVT, B);
25258 SDValue Mul = DAG.getNode(ISD::MUL, dl, ExVT, ExA, ExB);
25259 Mul = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExVT, Mul, 8, DAG);
25260 return DAG.getNode(ISD::TRUNCATE, dl, VT, Mul);
25271 SDValue ALo = extract128BitVector(A, 0, DAG, dl);
25272 SDValue BLo = extract128BitVector(B, 0, DAG, dl);
25273 SDValue AHi = extract128BitVector(A, NumElts / 2, DAG, dl);
25274 SDValue BHi = extract128BitVector(B, NumElts / 2, DAG, dl);
25275 ALo = DAG.getNode(ExAVX, dl, ExVT, ALo);
25276 BLo = DAG.getNode(ExAVX, dl, ExVT, BLo);
25277 AHi = DAG.getNode(ExAVX, dl, ExVT, AHi);
25278 BHi = DAG.getNode(ExAVX, dl, ExVT, BHi);
25279 SDValue Lo = DAG.getNode(ISD::MUL, dl, ExVT, ALo, BLo);
25280 SDValue Hi = DAG.getNode(ISD::MUL, dl, ExVT, AHi, BHi);
25281 Lo = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExVT, Lo, 8, DAG);
25282 Hi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExVT, Hi, 8, DAG);
25288 return DAG.getVectorShuffle(VT, dl, Lo, Hi,
25313 ALo = DAG.getNode(ISD::SIGN_EXTEND_VECTOR_INREG, dl, ExVT, A);
25315 AHi = DAG.getVectorShuffle(VT, dl, A, A, PSHUFDMask);
25316 AHi = DAG.getNode(ISD::SIGN_EXTEND_VECTOR_INREG, dl, ExVT, AHi);
25318 ALo = DAG.getBitcast(ExVT, getUnpackl(DAG, dl, VT, DAG.getUNDEF(VT), A));
25319 AHi = DAG.getBitcast(ExVT, getUnpackh(DAG, dl, VT, DAG.getUNDEF(VT), A));
25321 ALo = getTargetVShiftByConstNode(X86ISD::VSRAI, dl, ExVT, ALo, 8, DAG);
25322 AHi = getTargetVShiftByConstNode(X86ISD::VSRAI, dl, ExVT, AHi, 8, DAG);
25324 ALo = DAG.getBitcast(ExVT, getUnpackl(DAG, dl, VT, A,
25325 DAG.getConstant(0, dl, VT)));
25326 AHi = DAG.getBitcast(ExVT, getUnpackh(DAG, dl, VT, A,
25327 DAG.getConstant(0, dl, VT)));
25340 LoOp = DAG.getSExtOrTrunc(LoOp, dl, MVT::i16);
25341 HiOp = DAG.getSExtOrTrunc(HiOp, dl, MVT::i16);
25343 LoOp = DAG.getZExtOrTrunc(LoOp, dl, MVT::i16);
25344 HiOp = DAG.getZExtOrTrunc(HiOp, dl, MVT::i16);
25352 BLo = DAG.getBuildVector(ExVT, dl, LoOps);
25353 BHi = DAG.getBuildVector(ExVT, dl, HiOps);
25355 BLo = DAG.getNode(ISD::SIGN_EXTEND_VECTOR_INREG, dl, ExVT, B);
25357 BHi = DAG.getVectorShuffle(VT, dl, B, B, PSHUFDMask);
25358 BHi = DAG.getNode(ISD::SIGN_EXTEND_VECTOR_INREG, dl, ExVT, BHi);
25360 BLo = DAG.getBitcast(ExVT, getUnpackl(DAG, dl, VT, DAG.getUNDEF(VT), B));
25361 BHi = DAG.getBitcast(ExVT, getUnpackh(DAG, dl, VT, DAG.getUNDEF(VT), B));
25363 BLo = getTargetVShiftByConstNode(X86ISD::VSRAI, dl, ExVT, BLo, 8, DAG);
25364 BHi = getTargetVShiftByConstNode(X86ISD::VSRAI, dl, ExVT, BHi, 8, DAG);
25366 BLo = DAG.getBitcast(ExVT, getUnpackl(DAG, dl, VT, B,
25367 DAG.getConstant(0, dl, VT)));
25368 BHi = DAG.getBitcast(ExVT, getUnpackh(DAG, dl, VT, B,
25369 DAG.getConstant(0, dl, VT)));
25374 SDValue RLo = DAG.getNode(ISD::MUL, dl, ExVT, ALo, BLo);
25375 SDValue RHi = DAG.getNode(ISD::MUL, dl, ExVT, AHi, BHi);
25376 RLo = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExVT, RLo, 8, DAG);
25377 RHi = getTargetVShiftByConstNode(X86ISD::VSRLI, dl, ExVT, RHi, 8, DAG);
25380 return DAG.getNode(X86ISD::PACKUS, dl, VT, RLo, RHi);