reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
773 assert((I.getOpcode() == TargetOpcode::G_ZEXT) && "unexpected instruction"); 775 const Register DstReg = I.getOperand(0).getReg(); 776 const Register SrcReg = I.getOperand(1).getReg(); 813 LLVM_DEBUG(dbgs() << "Failed to constrain " << TII.getName(I.getOpcode()) 829 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(ZextEntryIt->MovOp)) 829 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(ZextEntryIt->MovOp)) 829 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(ZextEntryIt->MovOp)) 834 BuildMI(*I.getParent(), I, I.getDebugLoc(), 834 BuildMI(*I.getParent(), I, I.getDebugLoc(), 834 BuildMI(*I.getParent(), I, I.getDebugLoc(), 841 I.eraseFromParent(); 863 BuildMI(*I.getParent(), I, I.getDebugLoc(), 863 BuildMI(*I.getParent(), I, I.getDebugLoc(), 863 BuildMI(*I.getParent(), I, I.getDebugLoc(), 871 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AndOpc), DstReg) 871 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AndOpc), DstReg) 871 *BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(AndOpc), DstReg) 877 I.eraseFromParent();