reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

utils/TableGen/X86RecognizableInstr.cpp
  417         operandMapping[operandIndex] = operandIndex;
  418         operandMapping[Constraint.getTiedOperand()] = operandIndex;
  421         operandMapping[operandIndex] = operandIndex;
  425       operandMapping[operandIndex] = operandIndex;
  463     HANDLE_OPERAND(relocation);
  466     HANDLE_OPERAND(relocation);
  469     HANDLE_OPERAND(relocation);
  470     HANDLE_OPERAND(relocation);
  476     HANDLE_OPTIONAL(relocation)
  480     HANDLE_OPERAND(relocation);
  487     HANDLE_OPERAND(opcodeModifier)
  488     HANDLE_OPTIONAL(relocation)
  494     HANDLE_OPERAND(relocation)
  495     HANDLE_OPERAND(opcodeModifier)
  507     HANDLE_OPERAND(rmRegister)
  509       HANDLE_OPERAND(writemaskRegister)
  514       HANDLE_OPERAND(vvvvRegister)
  516     HANDLE_OPERAND(roRegister)
  517     HANDLE_OPTIONAL(immediate)
  528     HANDLE_OPERAND(memory)
  531       HANDLE_OPERAND(writemaskRegister)
  536       HANDLE_OPERAND(vvvvRegister)
  538     HANDLE_OPERAND(roRegister)
  539     HANDLE_OPTIONAL(immediate)
  552     HANDLE_OPERAND(roRegister)
  555       HANDLE_OPERAND(writemaskRegister)
  560       HANDLE_OPERAND(vvvvRegister)
  562     HANDLE_OPERAND(rmRegister)
  563     HANDLE_OPTIONAL(immediate)
  564     HANDLE_OPTIONAL(immediate) // above might be a register in 7:4
  569     HANDLE_OPERAND(roRegister)
  570     HANDLE_OPERAND(rmRegister)
  571     HANDLE_OPERAND(vvvvRegister)
  576     HANDLE_OPERAND(roRegister)
  577     HANDLE_OPERAND(vvvvRegister)
  578     HANDLE_OPERAND(immediate) // Register in imm[7:4]
  579     HANDLE_OPERAND(rmRegister)
  580     HANDLE_OPTIONAL(immediate)
  585     HANDLE_OPERAND(roRegister)
  586     HANDLE_OPERAND(rmRegister)
  587     HANDLE_OPERAND(opcodeModifier)
  599     HANDLE_OPERAND(roRegister)
  602       HANDLE_OPERAND(writemaskRegister)
  607       HANDLE_OPERAND(vvvvRegister)
  609     HANDLE_OPERAND(memory)
  610     HANDLE_OPTIONAL(immediate)
  611     HANDLE_OPTIONAL(immediate) // above might be a register in 7:4
  616     HANDLE_OPERAND(roRegister)
  617     HANDLE_OPERAND(memory)
  618     HANDLE_OPERAND(vvvvRegister)
  623     HANDLE_OPERAND(roRegister)
  624     HANDLE_OPERAND(vvvvRegister)
  625     HANDLE_OPERAND(immediate) // Register in imm[7:4]
  626     HANDLE_OPERAND(memory)
  627     HANDLE_OPTIONAL(immediate)
  632     HANDLE_OPERAND(roRegister)
  633     HANDLE_OPERAND(memory)
  634     HANDLE_OPERAND(opcodeModifier)
  639     HANDLE_OPERAND(rmRegister)
  640     HANDLE_OPERAND(opcodeModifier)
  659       HANDLE_OPERAND(vvvvRegister)
  662       HANDLE_OPERAND(writemaskRegister)
  663     HANDLE_OPTIONAL(rmRegister)
  664     HANDLE_OPTIONAL(relocation)
  665     HANDLE_OPTIONAL(immediate)
  670     HANDLE_OPERAND(memory)
  671     HANDLE_OPERAND(opcodeModifier)
  689       HANDLE_OPERAND(vvvvRegister)
  691       HANDLE_OPERAND(writemaskRegister)
  692     HANDLE_OPERAND(memory)
  693     HANDLE_OPTIONAL(relocation)
  700     HANDLE_OPERAND(immediate)
  701     HANDLE_OPERAND(immediate)
  706     HANDLE_OPERAND(immediate)
  707     HANDLE_OPERAND(immediate)
  712     HANDLE_OPTIONAL(relocation)