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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12768 { 72 /* adds */, AArch64::ADDSWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, AMFBS_None, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImm }, },
13206 { 661 /* cmn */, AArch64::ADDSWri, Convert__regWZR__Reg1_0__AddSubImm2_1, AMFBS_None, { MCK_GPR32sp, MCK_AddSubImm }, },
13218 { 665 /* cmp */, AArch64::ADDSWri, Convert__regWZR__Reg1_0__AddSubImmNeg2_1, AMFBS_UseNegativeImmediates, { MCK_GPR32sp, MCK_AddSubImmNeg }, },
19001 { 5976 /* subs */, AArch64::ADDSWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, AMFBS_UseNegativeImmediates, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImmNeg }, },
20126 { 72 /* adds */, AArch64::ADDSWri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, AMFBS_None, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImm }, },
20564 { 661 /* cmn */, AArch64::ADDSWri, Convert__regWZR__Reg1_0__AddSubImm2_1, AMFBS_None, { MCK_GPR32sp, MCK_AddSubImm }, },
20576 { 665 /* cmp */, AArch64::ADDSWri, Convert__regWZR__Reg1_0__AddSubImmNeg2_1, AMFBS_UseNegativeImmediates, { MCK_GPR32sp, MCK_AddSubImmNeg }, },
26359 { 5976 /* subs */, AArch64::ADDSWri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, AMFBS_UseNegativeImmediates, { MCK_GPR32, MCK_GPR32sp, MCK_AddSubImmNeg }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc14805 case AArch64::ADDSWri:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc15521 case AArch64::ADDSWri:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc93427 /*212570*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::ADDSWri), 0,
93439 /*212598*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::ADDSWri), 0,
93523 /*212788*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::ADDSWri), 0,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18068 case AArch64::ADDSWri:
29806 case AArch64::ADDSWri:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 9452 case AArch64::ADDSWri:
lib/Target/AArch64/AArch64CondBrTuning.cpp 169 case AArch64::ADDSWri:
lib/Target/AArch64/AArch64ConditionOptimizer.cpp 171 case AArch64::ADDSWri:
218 case AArch64::ADDSWri: return AArch64::SUBSWri;
220 case AArch64::SUBSWri: return AArch64::ADDSWri;
247 bool Negative = (Opc == AArch64::ADDSWri || Opc == AArch64::ADDSXri);
lib/Target/AArch64/AArch64ConditionalCompares.cpp 326 case AArch64::ADDSWri:
661 case AArch64::ADDSWri: Opc = AArch64::CCMNWi; break;
lib/Target/AArch64/AArch64FastISel.cpp 1373 { AArch64::ADDSWri, AArch64::ADDSXri } }
lib/Target/AArch64/AArch64InstrInfo.cpp 442 case AArch64::ADDSWri:
1017 case AArch64::ADDSWri:
1100 case AArch64::ADDSWri:
1101 return MIDefinesZeroReg ? AArch64::ADDSWri : AArch64::ADDWri;
1232 case AArch64::ADDSWri:
1244 return AArch64::ADDSWri;
1377 return Opcode == AArch64::ADDSWri || Opcode == AArch64::ADDSXri;
1845 return AArch64::ADDSWri;
3505 case AArch64::ADDSWri:
3527 case AArch64::ADDSWri:
lib/Target/AArch64/AArch64InstructionSelector.cpp 3175 {AArch64::ADDSWrr, AArch64::ADDSWri}};
lib/Target/AArch64/AArch64MacroFusion.cpp 33 case AArch64::ADDSWri:
lib/Target/AArch64/AArch64RedundantCopyElimination.cpp 176 case AArch64::ADDSWri:
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 4110 case AArch64::ADDSWri: