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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12771 { 72 /* adds */, AArch64::SUBSXri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, AMFBS_UseNegativeImmediates, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImmNeg }, },
13208 { 661 /* cmn */, AArch64::SUBSXri, Convert__regXZR__Reg1_0__AddSubImmNeg2_1, AMFBS_UseNegativeImmediates, { MCK_GPR64sp, MCK_AddSubImmNeg }, },
13222 { 665 /* cmp */, AArch64::SUBSXri, Convert__regXZR__Reg1_0__AddSubImm2_1, AMFBS_None, { MCK_GPR64sp, MCK_AddSubImm }, },
19006 { 5976 /* subs */, AArch64::SUBSXri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, AMFBS_None, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImm }, },
20129 { 72 /* adds */, AArch64::SUBSXri, Convert__Reg1_0__Reg1_1__AddSubImmNeg2_2, AMFBS_UseNegativeImmediates, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImmNeg }, },
20566 { 661 /* cmn */, AArch64::SUBSXri, Convert__regXZR__Reg1_0__AddSubImmNeg2_1, AMFBS_UseNegativeImmediates, { MCK_GPR64sp, MCK_AddSubImmNeg }, },
20580 { 665 /* cmp */, AArch64::SUBSXri, Convert__regXZR__Reg1_0__AddSubImm2_1, AMFBS_None, { MCK_GPR64sp, MCK_AddSubImm }, },
26364 { 5976 /* subs */, AArch64::SUBSXri, Convert__Reg1_0__Reg1_1__AddSubImm2_2, AMFBS_None, { MCK_GPR64, MCK_GPR64sp, MCK_AddSubImm }, },
gen/lib/Target/AArch64/AArch64GenAsmWriter.inc25821 case AArch64::SUBSXri:
gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc26537 case AArch64::SUBSXri:
gen/lib/Target/AArch64/AArch64GenDAGISel.inc65777 /*160197*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSXri), 0,
65789 /*160224*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSXri), 0,
86926 /*200642*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSXri), 0,
93464 /*212654*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSXri), 0,
93476 /*212682*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSXri), 0,
93560 /*212872*/ OPC_MorphNodeTo2, TARGET_VAL(AArch64::SUBSXri), 0,
gen/lib/Target/AArch64/AArch64GenGlobalISel.inc 1606 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSXri,
1634 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSXri,
4479 GIR_BuildMI, /*InsnID*/0, /*Opcode*/AArch64::SUBSXri,
gen/lib/Target/AArch64/AArch64GenInstrInfo.inc18073 case AArch64::SUBSXri:
29811 case AArch64::SUBSXri:
gen/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc 9457 case AArch64::SUBSXri:
lib/Target/AArch64/AArch64CondBrTuning.cpp 238 case AArch64::SUBSXri:
lib/Target/AArch64/AArch64ConditionOptimizer.cpp 169 case AArch64::SUBSXri:
219 case AArch64::ADDSXri: return AArch64::SUBSXri;
221 case AArch64::SUBSXri: return AArch64::ADDSXri;
lib/Target/AArch64/AArch64ConditionalCompares.cpp 324 case AArch64::SUBSXri:
627 Opc = AArch64::SUBSXri;
659 case AArch64::SUBSXri: Opc = AArch64::CCMPXi; break;
lib/Target/AArch64/AArch64FastISel.cpp 1372 { { AArch64::SUBSWri, AArch64::SUBSXri },
lib/Target/AArch64/AArch64InstrInfo.cpp 580 BuildMI(MBB, I, DL, get(AArch64::SUBSXri), AArch64::XZR)
1018 case AArch64::SUBSXri:
1124 case AArch64::SUBSXri:
1125 return MIDefinesZeroReg ? AArch64::SUBSXri : AArch64::SUBXri;
1238 case AArch64::SUBSXri:
1260 return AArch64::SUBSXri;
1381 return Opcode == AArch64::SUBSWri || Opcode == AArch64::SUBSXri;
1912 return AArch64::SUBSXri;
3057 case AArch64::SUBSXri:
3152 Opc = SetNZCV ? AArch64::SUBSXri : AArch64::SUBXri;
3512 case AArch64::SUBSXri:
3550 case AArch64::SUBSXri:
lib/Target/AArch64/AArch64InstructionSelector.cpp 3255 CmpOpc = CmpOpc == AArch64::SUBSWrr ? AArch64::SUBSWri : AArch64::SUBSXri;
lib/Target/AArch64/AArch64MacroFusion.cpp 43 case AArch64::SUBSXri:
264 case AArch64::SUBSXri:
lib/Target/AArch64/AArch64RedundantCopyElimination.cpp 182 case AArch64::SUBSXri: {
lib/Target/AArch64/AArch64SpeculationHardening.cpp 369 BuildMI(MBB, MBBI, DebugLoc(), TII->get(AArch64::SUBSXri))
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp 4115 case AArch64::SUBSXri: