reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
18262 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 18288 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 18301 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 18327 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 18498 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 18524 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 18537 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 18563 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 18615 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 18628 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 18654 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24010 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24036 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24049 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24075 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24273 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24286 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24312 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) &&gen/lib/Target/AArch64/AArch64GenAsmWriter1.inc
18978 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 19004 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 19017 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 19043 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 19214 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 19240 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 19253 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 19279 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 19331 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 19344 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 19370 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24726 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24752 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24765 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24791 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 24989 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 25002 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) && 25028 MRI.getRegClass(AArch64::DDRegClassID).contains(MI->getOperand(1).getReg()) &&gen/lib/Target/AArch64/AArch64GenInstrInfo.inc
6673 static const MCOperandInfo OperandInfo272[] = { { AArch64::DDRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, }; 6674 static const MCOperandInfo OperandInfo273[] = { { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::DDRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { AArch64::GPR64spRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { AArch64::GPR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };gen/lib/Target/AArch64/AArch64GenRegisterBank.inc
54 (1u << (AArch64::DDRegClassID - 0)) |
gen/lib/Target/AArch64/AArch64GenRegisterInfo.inc3464 { DD, DDBits, 272, 32, sizeof(DDBits), AArch64::DDRegClassID, 1, true }, 7218 &AArch64MCRegisterClasses[DDRegClassID],lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
1083 AArch64::DDRegClassID, AArch64::DDDRegClassID, AArch64::DDDDRegClassID};
lib/Target/AArch64/AArch64RegisterBankInfo.cpp 234 case AArch64::DDRegClassID:
lib/Target/AArch64/AArch64RegisterInfo.cpp 564 case AArch64::DDRegClassID:
lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp 1261 if (MRI.getRegClass(AArch64::DDRegClassID).contains(Reg) ||